The AD5754AREZ is a quad 16-bit voltage-output DAC with serial interface in TSSOP-24. Each DAC channel has a separate input register and DAC register, allowing double-buffered updates: data is shifted into the input register via SPI, then all four outputs update simultaneously when LDAC is asserted. The output amplifier is powered from the AVDD rail (+12V or +15V) and provides rail-to-rail output swing. The output voltage range is pin-programmable: +/-10V, +/-5V, 0 to +10V, or 0 to +5V depending on configuration and the reference voltage. The 16-bit resolution provides 305uV steps on the +/-10V range. The CLR pin asynchronously resets all DAC outputs to the zero-scale or mid-scale code depending on configuration. The RESET pin performs a full power-on reset, clearing all registers. Typical settling time is 10us to +/-0.003% FSR for a full-scale step.