The MCP4921T-E/SN is a 12-bit voltage-output DAC with SPI interface in SOIC-8. The DAC uses a R-2R resistor ladder network where each bit of the 12-bit digital code connects a 2R resistor to either VREF or AVSS through CMOS switches. The output voltage is VOUT = (D/4096) x VREF, where D is the 12-bit digital code (0-4095). The SPI write sequence: 1) CS goes LOW, 2) 16-bit word is clocked in MSB-first on SDI (4 config bits + 12 data bits), 3) CS goes HIGH to transfer data to the input register. The LDAC pin then transfers the input register to the DAC register, updating the output. This double-buffered architecture allows synchronous updates when multiple MCP4921 devices share the SPI bus. The output amplifier has rail-to-rail output capability and can drive 5kOhm/50pF loads. Settling time to +/-0.5 LSB is 4.5us.