AT24C02

The AT24C02 is a 2-Wire Serial EEPROM manufactured by Microchip Technology (formerly Atmel), providing 2048 bits (256 x 8) of electrically erasable and programmable read-only memory. The device is accessed via an I2C-compatible serial interface supporting 100 kHz (1.8V) and 400 kHz (2.7V/5V) clock rates, with newer CS-series variants supporting 1 MHz (FM+) mode above 2.5V.

The AT24C02 operates from a supply voltage of 1.8V to 5.5V, with 8-byte page write mode and self-timed write cycle of 5 ms maximum. It supports up to 8 devices on the same I2C bus via three address input pins (A0-A2). The WP (Write Protect) pin provides hardware data protection for the entire memory array. Key reliability specifications include 1 million write cycle endurance and 100-year data retention.

The device is available in multiple package options including 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead TSSOP, 5-lead SOT23, 8-lead MAP, and 8-ball dBGA2. The operating temperature range is -40 to +85C (industrial), with automotive-grade devices supporting -40 to +125C. The AT24C02 is RoHS compliant and halogen-free. The AT24CS02 variant includes a factory-programmed 128-bit unique serial number.

The AT24C02 operates as an I2C slave EEPROM device:

1. I2C Interface: The device communicates via a 2-wire serial bus (SDA for data, SCL for clock). Both lines are open-drain and require external pull-up resistors. The device supports Standard Mode (100 kHz), Fast Mode (400 kHz), and FM+ Mode (1 MHz on CS-series).

2. Device Addressing: The 7-bit slave address consists of a 4-bit device type identifier (1010), followed by three address bits (A2, A1, A0) set by the hardware pins, and a R/W bit. This allows up to 8 AT24C02 devices on the same bus.

3. Memory Organization: The 2 Kbit memory is organized as 256 words of 8 bits each. Memory is accessed via an 8-bit address byte sent after the slave address during a write or read operation.

4. Write Operation: Supports byte write and page write (8-byte page). During a page write, up to 8 bytes can be written in a single cycle. The internal address counter increments within the page boundary (wraps around within the same page). The self-timed write cycle takes up to 5 ms, during which the device does not acknowledge I2C commands (ACK polling can be used to detect completion).

5. Read Operation: Supports random read (address specified), sequential read (address auto-increments), and current address read (reads from the address of the last access + 1).

6. Write Protection: When the WP pin is connected to VCC, all write operations to the entire memory array are inhibited. Connecting WP to GND allows normal read/write operations.

7. Power Management: The device enters standby mode when no I2C activity is present, drawing typically 6 uA or less.