TPS5420DDAR

The TPS5420DDAR from Texas Instruments is a 2A step-down (buck) switching regulator with integrated 110mOhm N-channel MOSFET in an 8-pin SOIC package. The DDA denotes the SOIC-8 (thermally enhanced) package, R denotes tape and reel (2500 pcs/reel). The device accepts a wide 5.5-36V input and produces an adjustable output from 1.22V to 31V at up to 2A continuous (3A peak). The 500kHz fixed switching frequency keeps the external inductor and capacitor values small, reducing solution size. The integrated 110mOhm high-side MOSFET eliminates the need for an external switch, reducing component count and ensuring high efficiency up to 95%. Internal compensation simplifies design by removing the need for external compensation components, though this limits the range of LC output filter values that can be used. Input voltage feed-forward maintains constant loop gain over the input range, improving line regulation and transient response compared to conventional voltage-mode control. An internal slow-start circuit limits inrush current during startup. The active-high ENA pin reduces quiescent current to 18uA in shutdown. Protection features include pulse-by-pulse overcurrent limiting, output overvoltage protection, undervoltage lockout (UVLO at 5.5V), and thermal shutdown.

The TPS5420DDAR operates through five subsystems: (1) Power Stage: The integrated N-channel MOSFET connects VIN to the output through an external inductor. When the MOSFET is ON, current flows from VIN through the MOSFET and inductor to the output capacitor and load, storing energy in the inductor. When the MOSFET turns OFF, the external Schottky catch diode provides a path for inductor current to continue flowing to the output. (2) Voltage Mode Control with Feed-Forward: An internal error amplifier compares the FB pin voltage (from an external resistor divider on VOUT) with the 1.22V reference. The error amplifier output controls the PWM duty cycle. An input voltage feed-forward circuit adjusts the PWM ramp amplitude proportionally to VIN, maintaining constant loop gain and improving line transient response without requiring a change in compensation. (3) Internal Compensation: The error amplifier includes internal Type-II compensation (a zero and a pole), which is optimized for a specific range of output LC filter values. This simplifies design but requires the designer to choose inductor and capacitor values that work with the internal compensation. (4) Slow Start: An internal ramp gradually increases the duty cycle from zero to the regulation point over approximately 2ms, limiting inrush current in the output capacitor and preventing output overshoot. (5) Protection: Cycle-by-cycle current limiting (by monitoring the MOSFET current), output overvoltage protection (by comparing FB with an OVP threshold), UVLO (prevents operation below 5.5V), and thermal shutdown (disables output above approximately 165C junction temperature).

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