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PCA9617ADP


Fm+ I2C 中继器,0.8-5.5V 至 2.2-5.5V 电平转换,1MHz,540pF 总线隔离,TSSOP-8,-40~85°C

4000

有效库存
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制造商零件:

PCA9617ADP

包装:

TSSOP-8 (SOT505-1)(3.0 x 4.4 x 1.1 毫米,0.65 毫米间距)

品牌:
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说明

NXP Semiconductors 的 PCA9617ADP 是一款电平转换快速模式 Plus I2C 总线中继器,采用 8 引脚 TSSOP 封装(3.0 x 4.4 mm)。它在低电压侧(端口 A:0.8 V 至 5.5 V,正常电平)和高电压侧(端口 B:2.2 V 至 5.5 V,静态偏移电平)之间为 I2C SDA 和 SCL 线路提供双向缓冲和电压电平转换。该器件支持 0 Hz 至 1000 kHz 的时钟频率,在 1 MHz 时支持 540 pF 的双总线,在较低速度时支持高达 4000 pF 的双总线。端口 B 具有 0.55 V 静态偏移,可实现无锁存操作。高电平有效使能输入。5 V 容差 I/O 引脚。ESD 保护超过 5500 V HBM。工作温度范围为 -40°C 至 +85°C。.

PCA9617A 是恩智浦的一款 I2C 总线中继器,可在两个 I2C 总线段之间提供电压电平转换和总线电容隔离。PCA9617ADP 是 TSSOP-8 封装版本,是 PCA9517A 在快速模式速度下的基底面和功能替代品,并具有支持快速模式 Plus (1 MHz) 的额外优势。.

该器件有两个具有不同电压和信号特性的端口。端口 A 的工作电压为 0.8 V 至 5.5 V,具有正常的 CMOS 逻辑电平 - 其输出下拉至接近 0 V(硬低电平),输入阈值为 0.35 × VCC(A)。端口 B 的工作电压范围为 2.2 V 至 5.5 V,静态偏移约为 0.55 V - 其输出下拉至 0.55 V,输入阈值约为 0.45 V。偏移设计可防止闩锁:当端口 B 内部驱动 0.55 V 的低电平时,其自身的输入(阈值 0.45 V)不会将其识别为有效低电平,从而防止器件将自身保持在低电平状态。.

PCA9617A 的主要优势在于总线电容隔离。无论另一端的电容如何,中继器的每个端口对其各自的总线只产生约 7 pF 的电容。这使得系统设计人员能够创建远远超过 400 pF 规格限制的大型 I2C 网络。在 1 MHz (Fm+)时,每侧可支持高达 540 pF;在较低的速度下,每侧可支持高达 4000 pF。.

电平转换可双向进行,无需方向引脚 - 开路漏极 I2C 总线结构本身就支持这种转换。端口 A 上的低电平(低于 0.3 × VCC(A))接通端口 B 下拉。端口 B 上的低电平(低于 0.4 V)接通端口 A 下拉。这种双向操作对 I2C 协议是透明的,包括仲裁、时钟拉伸和多主场景。.

EN(使能)引脚为高电平有效,以 VCC(B)为基准。当 EN 为低电平时,两个端口驱动器均被禁用,所有 I/O 引脚均为高阻抗。只有当 VCC(A) > 0.8 V 和 VCC(B) > 2.2 V 时,器件才会启用,内部基准沉淀的上电延迟约为 400 µs。.

PCA9617A 已列入恩智浦 15 年产品寿命计划,因此适用于长生命周期的工业和汽车应用。.

**双向开漏缓冲:** PCA9617A 实现了两个相同的通道(SDA 和 SCL),每个通道由一对背靠背连接在端口 A 和端口 B 之间的开漏缓冲器组成。.

**端口 A 到端口 B 的转换:** 当端口 A 上的器件将 SDA_A 拉低至 0.3 × VCC(A) 以下时,端口 B 驱动器启动并将 SDA_B 拉低至约 0.55 V(由于静态偏移,未拉低至 0 V)。当 SDA_A 升至阈值以上时,端口 B 驱动器释放,SDA_B 上的外部上拉电阻将其拉高。.

**端口 B 到端口 A 转换:** 当端口 B 上的设备将 SDA_B 拉低至 0.4 V 以下时,端口 A 驱动器激活并将 SDA_A 拉低至接近 0 V(硬低电平)。当 SDA_B 升至 0.4 V 以上时,端口 A 驱动器释放。端口 A 的硬低电平对于低压工作至关重要,因为它能最大限度地提高 0.8 V 时的噪声裕量。.

**端口 B 上的 0.55 V 偏移意味着,当 PCA9617A 内部将端口 B 驱动为低电平时,产生的 0.55 V 电平高于端口 B 输入阈值(0.45 V?- 不,内部缓冲器输入比输出低 90 mV,约为 0.45 V)。实际上,输入阈值设置比输出下拉电平低 90 mV:输出驱动为 0.55 V,输入阈值为 0.45 V。因此,内部产生的 0.55 V 不会被输入识别为低电平(因为它高于 0.45 V)。这就避免了器件无限期保持低电平的锁存情况。.

**电容隔离:** 每个端口对其总线的负载仅为 ~7 pF。缓冲作用意味着一个总线上的电容不会增加到另一个总线上。每个总线上的上升时间仅由该侧的上拉电阻和电容决定,而不是由系统总电容决定。.

针脚 名称 类型 说明
1 SCL_A 输入/输出 端口 A I2C 时钟;漏极开路 I/O;0.8-5.5V;5V 容差;7pF 典型电容;低电平硬输出(~0V)
2 SDA_A 输入/输出 端口 A I2C 数据;漏极开路 I/O;特性与 SCL_A 相同
3 VCC(A) P 端口 A 电源;0.8V 至 5.5V;使用 0.1µF 旁路;必须大于 0.8V 才能启用
4 接地 G 接地;连接至 PCB 地平面
5 EN I 使能输入;高电平有效;参考 VCC(B);驱动高电平可使能中继器;低电平可禁用两个驱动器;仅在总线空闲时改变
6 SCL_B 输入/输出 端口 B I2C 时钟;漏极开路 I/O;2.2-5.5V;5V 容差;静态偏移输出(~0.55V)
7 SDA_B 输入/输出 端口 B I2C 数据;漏极开路 I/O;特性与 SCL_B 相同
8 VCC(B) P 端口 B 电源;2.2V 至 5.5V;使用 0.1µF 旁路;启用电压必须大于 2.2V;EN 引脚参考该电源
应用 说明
多电压 I2C 传感器网络 将 1.8V MCU I2C 总线(端口 A)连接至 5V 传感器总线(端口 B);双向电平转换,无需方向引脚;540pF 隔离允许 5V 侧连接多个传感器;EN 引脚用于 MCU 休眠期间的总线隔离
长距离 I2C 扩展 通过将 I2C 总线分成两段,将其扩展到超过 400pF 的限制;本地总线(低电容,端口 A)和远程总线(高电容电缆,端口 B);在 100kHz 时支持 4000pF,允许电缆长度超过 10 米;与 P82B96 配对可实现更长的电缆长度
热插拔 I2C 卡隔离 将背板 I2C 总线(端口 B)与插入式板卡 I2C(端口 A)隔离;电容隔离保护背板免受板卡插入瞬变的影响;断电高阻抗防止板卡在无电源时加载总线;EN 引脚由板卡检测信号控制
模型 制造商 兼容性 主要区别
PCA9517ADP 恩智浦 兼容脚本的前身 相同的 TSSOP-8 引脚输出;仅 Fm (400kHz) 与 Fm+ (1MHz);最大频率较低;用于不需要 Fm+ 速度的传统设计
PCA9617ATP 恩智浦 系列变体 (HWSON8) 采用 HWSON8(2x3mm)封装,具有相同功能;占用空间更小;无引线;适用于空间受限的设计
TCA9406DCUR TI 功能等效 2 通道 I2C 电平转换器;1.65-3.6V 至 2.7-5.5V;1MHz Fm+;VSSOP-8;不同偏移架构;验证多中继器设计的兼容性
ltc4311iddb#trmpbf ADI 竞争性替代方案 I2C 总线加速器(上升时间加速器);非电平转换器;DFN-8;仅在需要改进上升时间而不需要电压转换时使用
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