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SN74LS148N

8-to-3 priority encoder, active-low, cascade EI/EO/GS, LS TTL, PDIP-16

4500

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制造商零件：

SN74LS148N

包装：

PDIP-16 (19.3 x 6.35 x 4.57mm, 2.54mm pitch, through-hole)

品牌：

产品类别：

集成电路 IC, 接口集成电路

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说明

产品概览

The SN74LS148N is an 8-line to 3-line priority encoder from Texas Instruments with active-low inputs/outputs, cascading capability, and group signal outputs in a 16-pin PDIP package.

主要规格

功能	8-line to 3-line priority encoder
逻辑家族	LS (Low-power Schottky)
电源电压	4.75V to 5.25V (5V nominal)
Inputs	8 active-low (0-7), 1 enable (EI, active-low)
Outputs	3 active-low (A2, A1, A0), GS, EO
Priority	Input 7 is highest priority
传播延迟	15ns typical (data to output)
Enable Input (EI)	Active-low (device enabled when EI=LOW)
Group Signal (GS)	Active-low (asserted when any input is active)
Enable Output (EO)	Active-low (asserted when no input is active)
工作温度	0°C to +70°C
包装	PDIP-16 (19.3 x 6.35mm)

特点

8-line to 3-line priority encoder with active-low I/O
Priority: input 7 has highest, input 0 lowest
Cascading via EI and EO for expanded encoding
Group signal (GS) indicates at least one active input
Enable input (EI) for device selection
Standard 74LS148 pinout

应用

Keyboard encoding
Interrupt vector generation
Priority interrupt encoding for CPUs
Data compression and encoding
Cascaded multi-chip encoding systems

产品介绍：SN74LS148N 产品介绍

The SN74LS148N from Texas Instruments is an 8-line to 3-line priority encoder that converts one of eight active-low input lines to a 3-bit binary output code. When multiple inputs are active simultaneously, the encoder outputs the code for the highest-priority input (input 7 is highest, input 0 is lowest). All inputs and outputs are active-low, simplifying connection to microprocessor interrupt systems that use active-low signals. The enable input (EI, active-low) activates the device; when EI is HIGH, all outputs are HIGH (inactive). The group signal (GS) output goes LOW when any input is active and the device is enabled, indicating a valid encoded output. The enable output (EO) goes LOW only when no inputs are active and the device is enabled. GS and EO facilitate cascading: for a 16-to-4 encoder, two 148s are used with the lower-priority device’s EO connected to the higher-priority device’s EI. The N suffix denotes the PDIP-16 through-hole package.

工作原理：SN74LS148N 工作原理

The SN74LS148N continuously evaluates the eight input lines (0-7, active-low). If input 7 is LOW (active), the outputs A2,A1,A0 = L,L,L (binary 7, active-low encoded as 000) regardless of the states of inputs 0-6. If input 7 is HIGH (inactive) and input 6 is LOW, the outputs = L,L,H (binary 6). This priority chain continues down to input 0, which only gets encoded if no higher-priority input is active. When the enable input (EI) is HIGH, the device is disabled: all data outputs (A0-A2) are HIGH, GS is HIGH, and EO is HIGH. When EI is LOW and at least one input is active, GS = LOW (indicating a valid encoding) and EO = HIGH. When EI is LOW and no inputs are active, GS = HIGH and EO = LOW. For cascading two devices to create a 16-to-4 encoder: the higher-priority device (inputs 8-15) has its EI connected to the system enable, and its EO connected to the lower-priority device’s EI. The GS outputs of both devices are NANDed to form the MSB (A3) of the 4-bit output. The A0-A2 outputs of both devices are ORed (wire-AND for active-low) to form the lower 3 bits.

引脚说明：SN74LS148N 引脚定义和功能

针脚	名称	类型	说明
1	4	输入	Input line 4 (active low)
2	5	输入	Input line 5 (active low)
3	6	输入	Input line 6 (active low)
4	7	输入	Input line 7 (active low, highest priority)
5	EO	输出	Enable output (active low, =LOW when no input active)
6	GS	输出	Group signal (active low, =LOW when any input active)
7	A2	输出	Encoded output MSB (active low)
8	接地	电源	地面
9	A1	输出	Encoded output middle bit (active low)
10	A0	输出	Encoded output LSB (active low)
11	0	输入	Input line 0 (active low, lowest priority)
12	1	输入	Input line 1 (active low)
13	2	输入	Input line 2 (active low)
14	3	输入	Input line 3 (active low)
15	EL	输入	Enable input (active low)
16	VCC	电源	Supply (4.75V to 5.25V)

Application Scenarios:In which products and applications isSN74LS148N 中古

Interrupt Encoder: 8 interrupt sources into 3-bit vector; GS connects to MCU /IRQ pin; A0-A2 read as interrupt ID
Keyboard Encoder: 8 keys into 3-bit code; priority resolves simultaneous key presses
16-Input Encoder: Cascade two 148s for 16-to-4 encoding; higher-priority EO drives lower EI
Priority Detection: GS output indicates any request; MCU reads A0-A2 only when GS=LOW
Data Compression: Encode 8 binary inputs into 3 bits for bus width reduction

Alternative Models:What chips are recommended as replacements for SN74LS148N

模型	制造商	主要区别	包装	Supply
74LS148N	TI/Nexperia	Original TTL version with 5V-only supply, typical propagation delay 10-15ns	DIP-16	5V TTL
74LS148D	TI/Nexperia	Surface-mount SOIC version of LS with identical logic function	SOIC-16	5V TTL
74HC148D	TI/Nexperia	CMOS version with wide 2-6V supply range, lower power consumption and higher noise immunity	SOIC-16	2-6V CMOS
74HC148N	TI/Nexperia	Through-hole DIP version of HC family for prototyping and repair	DIP-16	2-6V CMOS
74HCT148D	TI/Nexperia	CMOS with TTL-compatible input levels, ideal for mixing with LS devices at 5V	SOIC-16	4.5-5.5V TTL-in
74HCT148N	TI/Nexperia	Through-hole DIP version of HCT family for prototyping and repair	DIP-16	4.5-5.5V TTL-in

The 74148 is a 8-Line to 3-Line Priority Encoder. Family variants span from the original LS TTL (5V only) to modern LVC/AUP (down to 0.8V). HC and HCT versions offer 2-6V CMOS operation with HCT providing TTL-compatible input thresholds for mixed 5V systems. CD4000-series equivalents offer the widest 3-18V supply range at the cost of lower switching speed. DIP packages (N suffix) are through-hole; SOIC (D suffix) and TSSOP are surface-mount.

SN74LS148N

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