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AT24C04C-MAHM-T


4Kb I2C EEPROM, 512x8, 1MHz, 1M cycles, 8-UDFN 2x3mm

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制造商零件:

AT24C04C-MAHM-T

包装:

8-UDFN (2 x 3 mm) Exposed Pad

品牌:
产品类别:
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说明

产品概览

The AT24C04C-MAHM-T is a 4Kb I2C serial EEPROM from Microchip Technology organized as 512 x 8 bits, supporting 400 kHz (1.7V) and 1 MHz (>2.5V) clock rates with 1 million write cycle endurance and 100-year data retention in an 8-pin UDFN (2x3mm) package.

主要规格

Memory Size 4Kbit (512 x 8)
Interface I2C (2-wire)
Max Clock Frequency 1 MHz (>2.5V), 400 kHz (1.7V)
Page Size 16 bytes
Write Cycle Time 5 ms max (self-timed)
Access Time 550 ns
Endurance 1,000,000 write cycles
Data Retention > 100 years
电源电压 1.7 V to 5.5 V
Standby Current 6 µA max
工作温度 -40°C to +85°C
包装 8-UDFN (2 x 3 mm) Exposed Pad

特点

  • Dual-speed I2C: 400 kHz at 1.7V, 1 MHz above 2.5V
  • Hardware write-protect pin for data protection
  • Supports up to 4 devices on a single bus
  • Schmitt trigger filtered inputs for noise suppression
  • Self-timed write cycle (5 ms max)
  • 1 million erase/write cycle endurance
  • 100-year data retention
  • Automotive qualified version available

应用

  • Configuration and calibration storage
  • Industrial and consumer electronics
  • Automotive systems
  • Embedded parameter storage
  • Smart sensors and metering

The AT24C04C-MAHM-T is a 4Kb I2C-compatible serial EEPROM from Microchip Technology organized as 512 x 8 bits. It supports dual-speed operation at 400 kHz from 1.7V supply and 1 MHz above 2.5V, providing flexibility across voltage ranges. The device features a hardware write-protect pin, Schmitt trigger filtered inputs for noise suppression, self-timed write cycles (5 ms max), 1 million write cycle endurance, and greater than 100-year data retention. The compact 8-pin UDFN (2x3mm) package with exposed pad is ideal for space-constrained applications. The device supports up to 4 devices on a single I2C bus via configurable address pins.

The AT24C04C uses a standard I2C protocol with START, STOP, and ACK conditions for communication. The bus protocol begins with a START condition followed by the device address byte (1010+A2+A1+A0+R/W), where the lower address bits select one of up to 4 devices on the bus. For write operations, the master sends the word address followed by data bytes (up to 16 bytes per page write). The device acknowledges each byte and performs the write internally within 5 ms (self-timed). For read operations, the master writes the address byte then issues a repeated START with the R/W bit set to 1. The device then outputs data bytes sequentially. The Schmitt trigger inputs filter noise on SDA and SCL lines. The hardware write-protect pin (WP) blocks write operations to the entire array when held high, protecting critical data from accidental modification.

针脚 名称 类型 说明
1 A0 输入 Address bit 0 (connect to VCC or GND)
2 A1 输入 Address bit 1 (connect to VCC or GND)
3 A2 输入 Address bit 2 (connect to VCC or GND)
4 接地 电源 地面
5 SDA 输入/输出 Serial data (open-drain, bidirectional)
6 SCL 输入 Serial clock input
7 WP 输入 Write protect (HIGH = write protected)
8 VCC 电源 Supply voltage (1.7V to 5.5V)
  • Configuration Storage: Non-volatile 4Kb storage for device settings and calibration coefficients with 1M write cycle endurance
  • Industrial Electronics: Wide 1.7V-5.5V operation and Schmitt trigger inputs for noisy industrial environments
  • Automotive Systems: Automotive-grade version available for ECU parameter storage in -40°C to +125°C environments
  • Smart Sensors: Compact UDFN package fits alongside sensor ICs for on-board calibration data storage
  • Multi-Device Bus: 4 addressable devices per bus allows distributed EEPROM across system modules
模型 制造商 主要区别
AT24C08C-MAHM-T 微型芯片 8Kbit (1024×8), same package
AT24C04C-SSHM-T 微型芯片 Same, 8-SOIC package
24AA04-I/MC 微型芯片 4Kb, TSSOP-8, older series
BR24G04FVT-WE2 ROHM 4Kb I2C EEPROM, TSSOP-8
CAT24C04WI-GT3 onsemi 4Kb I2C EEPROM, TSSOP-8
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Address: Room 2919, Guoli Building, Huaqiang North, Futian District, Shenzhen, Guangdong, China
 

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