DMP2022LSS-13

The DMP2022LSS-13 from Diodes Incorporated is a -20 V P-channel enhancement-mode power MOSFET in an industry-standard SO-8 package with tape-and-reel packaging (2500 units per reel). The DMP2022LSS is also available without the -13 suffix (same device, different packaging format).

The device features ultra-low 13 mOhm maximum RDS(on) at VGS = -10 V, making it one of the lowest RDS(on) P-channel MOSFETs available in the SO-8 package. At VGS = -4.5 V, RDS(on) is 16 mOhm maximum, and at -2.5 V, it is 22 mOhm maximum. This logic-level drive performance enables direct MCU GPIO drive at 2.5 V and above for load-switch applications.

The -10 A continuous drain current rating and -90 A pulsed drain current provide substantial current handling for battery-powered and power-management applications. The 2.5 W power dissipation at 25C ambient (RthJA = 50C/W) requires adequate PCB copper area on the drain pins for thermal management.

The low threshold voltage (600-770 mV max at 250 uA) ensures the device turns on fully with modest gate drive voltage. However, care must be taken in high-temperature applications where off-state leakage can increase significantly with the low threshold.

The DMP2022LSS is AEC-Q101 qualified, making it suitable for automotive applications. An automotive-specific datasheet (DMP2022LSSQ) is available under separate documentation. The device is also halogen-free and antimony-free (green device).

The SO-8 package dedicates pins 1-3 to source, pin 4 to gate, and pins 5-8 to drain, providing low-inductance connections and efficient thermal transfer through the drain pins to the PCB copper.

**P-Channel Enhancement MOSFET:** The DMP2022LSS is a P-channel enhancement-mode MOSFET. Current flows from source to drain when the gate-source voltage is negative (VGS < VGS(th)). When VGS is 0 V (gate at source potential), no channel forms and the device is off. Applying a negative VGS creates an inversion layer (P-type channel) between source and drain. **Trench MOSFET Technology:** The device uses trench gate technology where the gate electrode is formed in vertical trenches etched into the silicon. This maximizes channel width per unit die area, achieving the ultra-low 13 mOhm RDS(on). The 2444 pF input capacitance and 56.9 nC gate charge reflect the large die area needed for this low RDS(on). **High-Side Switch Advantage:** P-channel MOSFETs are preferred for high-side load switching because the gate can be pulled low relative to the source (connected to VCC) to turn on the device. No bootstrap circuit or charge pump is needed, unlike N-channel high-side switches. This simplifies the gate drive circuit significantly. **Body Diode:** The inherent body diode from drain to source (anode at drain, cathode at source) has a forward voltage of approximately 0.9-1.2 V. This diode conducts during dead-time in bridge configurations but is not designed for continuous current rectification.