产品概览
The SN74LS76AN from Texas Instruments contains two independent J-K flip-flops with complementary outputs, preset and clear — more versatile than the D flip-flop 7474 thanks to J-K logic in a 16-pin PDIP package.
主要规格
| Number of Flip-Flops | 2 (dual, independent) |
| 逻辑家族 | LS (Low-power Schottky) |
| Trigger Type | Negative-edge (falling edge of CLK) |
| 电源电压 | 4.75V to 5.25V |
| Max Clock Frequency | 30MHz typical |
| J, K Inputs | Level-triggered (set before clock edge) |
| Preset (PRE) | Active-LOW (asynchronous, sets Q=1) |
| Clear (CLR) | Active-LOW (asynchronous, sets Q=0) |
| 传播延迟 | 15-20ns (CLK to Q) |
| 工作温度 | 0°C to +70°C |
| 包装 | PDIP-16 (19.3 x 6.35mm) |
特点
- Dual J-K negative-edge-triggered flip-flops
- J=0,K=0: hold; J=1,K=0: set; J=0,K=1: reset; J=1,K=1: toggle
- Asynchronous preset and clear (active-LOW)
- Complementary outputs (Q and NOT-Q)
- 30MHz clock frequency
应用
- Toggle flip-flop / frequency divider
- Data register
- Counter building block
- Control logic