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SN74LS153N

Dual 4:1 multiplexer, shared select, separate strobes, LS TTL, PDIP-16

4000

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制造商零件：

SN74LS153N

包装：

PDIP-16 (19.3 x 6.35 x 4.57mm, 2.54mm pitch, through-hole)

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说明

产品概览

The SN74LS153N from Texas Instruments contains two independent 4-line to 1-line data selectors/multiplexers with shared select inputs and individual strobes in a 16-pin PDIP package — half the functionality of the 74151 with separate enables for each multiplexer.

主要规格

功能 Dual 4-line to 1-line data selector/multiplexer
逻辑家族 LS (Low-power Schottky)
电源电压 4.75V to 5.25V
Select Inputs A, B (shared between both muxes)
Strobe 1G and 2G (separate, active-LOW)
Outputs 1Y and 2Y (true outputs only, no complement)
传播延迟 14–29ns typical
工作温度 0°C to +70°C
包装 PDIP-16 (19.3 x 6.35mm)

特点

  • Two 4:1 multiplexers in one package
  • Shared select inputs (A, B)
  • Separate strobe (enable) inputs
  • True outputs only (no complementary)
  • Can implement any 3-variable Boolean function

应用

  • 4-channel data selection
  • Parallel-to-serial conversion
  • Bus routing
  • Function generation

The SN74LS153N from Texas Instruments contains two independent 4-line to 1-line data selectors/multiplexers sharing the same 2-bit select input (A, B) but with separate active-LOW strobe inputs (1G, 2G). Each multiplexer selects one of four data inputs (1C0-1C3 or 2C0-2C3) based on the select code and routes it to the corresponding output (1Y or 2Y). When the strobe is HIGH, the output is forced LOW regardless of data and select inputs. The shared select inputs make the 74153 ideal for selecting two related signals simultaneously — for example, selecting the upper and lower nibbles of a data byte from four sources. Two 74153 chips can be combined to form an 8:1 multiplexer: the shared select inputs select one of four sources on each chip; a 3rd select bit (via an inverter) enables one chip while disabling the other; the outputs are ORed. The 74153 can also implement any 3-variable Boolean function by tying the four data inputs to VCC or GND per the truth table. The N suffix denotes the PDIP-16 through-hole package.

Each 4:1 multiplexer in the SN74LS153N selects one of four data inputs based on the 2-bit select code BA: BA=00 selects C0, BA=01 selects C1, BA=10 selects C2, BA=11 selects C3. The selected input appears at the Y output when the strobe G is LOW. When G is HIGH, Y=0 regardless of the data and select inputs. The logic function: Y = G’ · (C0·B’·A’ + C1·B’·A + C2·B·A’ + C3·B·A). The two multiplexers share the same select inputs (A, B) but have independent data inputs, strobes, and outputs. This shared-select arrangement ensures that both multiplexers switch to the same source number simultaneously — critical for parallel data routing. For function generation: tie C0-C3 to VCC (1) or GND (0) according to the desired truth table for a 3-variable function (B, A are two variables; the strobe G can be the third). For example, XOR of A and B: C0=0, C1=1, C2=1, C3=0, with G=LOW always.

针脚 名称 类型 说明
1 1G 输入 Mux 1 strobe/enable (active LOW)
2 1C0 输入 Mux 1 data input 0
3 1C1 输入 Mux 1 data input 1
4 1C2 输入 Mux 1 data input 2
5 1C3 输入 Mux 1 data input 3
6 1Y 输出 Mux 1 output
7 接地 电源 地面
8 2Y 输出 Mux 2 output
9 2C3 输入 Mux 2 data input 3
10 2C2 输入 Mux 2 data input 2
11 2C1 输入 Mux 2 data input 1
12 2C0 输入 Mux 2 data input 0
13 2G 输入 Mux 2 strobe/enable (active LOW)
14 B 输入 Select input B (MSB, shared)
15 A 输入 Select input A (LSB, shared)
16 VCC 电源 Supply (5V)
  • Parallel Data Routing: 4 data sources, 4 bits wide; upper nibble → 1C0-1C3; lower nibble → 2C0-2C3; shared A,B selects source; both nibbles selected simultaneously
  • 8:1 Multiplexer: Two 74153 chips; 3rd select bit (C) drives 1G (via inverter) and 2G (direct); outputs ORed; selects 1 of 8 sources
  • Function Generator: Tie C0-C3 per truth table; A,B are function inputs; Y = Boolean function of 3 variables (G = 3rd input)
  • Data Source Switching: ADC inputs on C0-C3; MCU controls A,B; Y → MCU input pin; scan 4 channels sequentially
模型 制造商 主要区别 包装 Supply
74LS153N TI/Nexperia Original TTL version with 5V-only supply, typical propagation delay 10-15ns DIP-16 5V TTL
74LS153D TI/Nexperia Surface-mount SOIC version of LS with identical logic function SOIC-16 5V TTL
74HC153D TI/Nexperia CMOS version with wide 2-6V supply range, lower power consumption and higher noise immunity SOIC-16 2-6V CMOS
74HC153N TI/Nexperia Through-hole DIP version of HC family for prototyping and repair DIP-16 2-6V CMOS
74HCT153D TI/Nexperia CMOS with TTL-compatible input levels, ideal for mixing with LS devices at 5V SOIC-16 4.5-5.5V TTL-in
74HCT153N TI/Nexperia Through-hole DIP version of HCT family for prototyping and repair DIP-16 4.5-5.5V TTL-in

The 74153 is a Dual 4-Line to 1-Line Data Selector/Multiplexer. Family variants span from the original LS TTL (5V only) to modern LVC/AUP (down to 0.8V). HC and HCT versions offer 2-6V CMOS operation with HCT providing TTL-compatible input thresholds for mixed 5V systems. CD4000-series equivalents offer the widest 3-18V supply range at the cost of lower switching speed. DIP packages (N suffix) are through-hole; SOIC (D suffix) and TSSOP are surface-mount.

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Tel / WhatsApp: +86 13760382860

服务与包装

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Contact Information

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Tel / WhatsApp: +86 13760382860
Address: Room 2919, Guoli Building, Huaqiang North, Futian District, Shenzhen, Guangdong, China
 

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