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SN74HC165DR


8-bit parallel-load shift register, PISO, 2-6V, 24 MHz, SOIC-16

4837

有效库存
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制造商零件:

SN74HC165DR

包装:

SOIC-16 (9.9 x 6.0 mm)

品牌:
产品类别:
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说明

产品概览

The SN74HC165DR is an 8-bit parallel-load shift register from Texas Instruments. When clocked, it shifts data toward a serial QH output. It features eight direct data inputs enabled by a low level at the shift/load input, a clock-inhibit function, and a complementary serial QH output, housed in a 16-pin SOIC package with wide -40C to +125C temperature range.

主要规格

Bits 8
配置 Parallel-in, Serial-out
电源电压 2V to 6V
Clock Frequency 24 MHz (HC at 5V)
Typical tpd 13 ns
Output Drive +/-5.2 mA at 5V
ICC (Max) 80 uA
包装 SOIC-16 (9.9 x 6.0 mm)
工作温度 -40C to +125C

特点

  • Wide operating voltage range: 2V to 6V
  • Complementary serial outputs (QH and QH)
  • Direct overriding load (data) inputs
  • Gated clock inputs with clock-inhibit function
  • Low power consumption: 80 uA max ICC
  • Drives up to 10 LSTTL loads

应用

  • Expanding microcontroller input pins
  • Parallel-to-serial data conversion
  • Keyboard and switch matrix scanning
  • Digital input expansion modules

The SN74HC165DR from Texas Instruments is an 8-bit parallel-load shift register designed for parallel-to-serial data conversion. Eight individual direct data (A-H) inputs are enabled by a low level at the shift/load (SH/LD) input, allowing asynchronous parallel data loading. When SH/LD is held high, data shifts toward the serial QH output on each rising clock edge. The device features a clock-inhibit (CLK INH) function and a complementary QH output, providing flexible interfacing options. With a wide operating voltage range of 2V to 6V and high noise immunity, it is ideal for expanding digital inputs in microcontroller-based systems.

The SN74HC165DR operates in two modes. When SH/LD is low, the eight parallel data inputs (A-H) are asynchronously loaded into the internal register, overriding any shift operation. When SH/LD is high and CLK INH is low, each rising edge of the CLK input shifts the register data one position toward the QH output, with the SER input filling the vacated position. The clock-inhibit (CLK INH) pin can prevent shifting when held high, and its function is interchangeable with CLK. The complementary QH output provides the inverse of the QH serial output. Multiple devices can be cascaded by connecting QH to the SER input of the next stage.

针脚 名称 类型 功能
1 SH/LD 输入 Shift/Load control (low=load, high=shift)
2 CLK 输入 Clock input (rising edge triggered)
3-6 E,F,G,H 输入 Parallel data inputs E-H
7 QH 输出 Inverted serial output
8 接地 地面 地面参考
9 QH 输出 Serial output
10 SER 输入 Serial data input (for cascading)
11-14 A,B,C,D 输入 Parallel data inputs A-D
15 CLK INH 输入 Clock inhibit (active high)
16 VCC 电源 Supply voltage 2-6V
  • Expanding microcontroller digital input capability
  • Parallel-to-serial data conversion for communication
  • Keyboard, switch matrix, and DIP switch scanning
  • Cascaded input expansion for PLC and industrial I/O modules
  • LED display data serialization
制造商 部件编号 包装 说明
TI SN74HC165N PDIP-16 Through-hole version
TI SN74HC165PWR TSSOP-16 Smaller TSSOP package
TI SN74HCT165DR SOIC-16 TTL-compatible inputs (4.5-5.5V)
恩智浦 74HC165D SOIC-16 Pin-compatible alternative
TI SN74HC165NSR SOP-16 Shrink SOP package
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服务与包装

我们从合作供应链采购的所有电子元件都经过严格的进货检验。通过仔细的测试,我们确保交付给客户的所有产品都是原装正品,符合质量要求。此外,我们还保存完整的检验记录,使整个供应链流程清晰可查。.

认证
我们获得了多项专业认证,并建立了自己的专业检测实验室,确保交付给客户的每一件产品都符合最高质量要求。我们严格按照流程进行检测,确保产品质量稳定、参数准确。为保证原装正品,我们还与可靠的第三方检测机构合作,进行严格的质量检测。我们始终高度重视质量,完全符合行业标准、相关法规和 ISO 9001:2015 的要求。.