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TPS73025DBVT

2.5V 200mA ultra-low-noise LDO, 30µVrms noise, 72dB PSRR, SOT-23-5

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Manufacturer Part：

TPS73025DBVT

Package：

SOT-23-5 (2.9 x 1.6 x 1.1mm)

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Description

Product Overview

The TPS73025DBVT from Texas Instruments is a 2.5V fixed-output, 200mA ultra-low-noise LDO regulator in an SOT-23-5 package. With 30µVrms output noise, 72dB PSRR, and 150mV dropout voltage, it is designed for noise-sensitive analog and RF applications.

Key Specifications

Output Voltage 2.5V (fixed)
Output Current 200mA
Input Voltage 2.7V – 5.5V
Dropout Voltage 150mV @200mA
Output Noise 30µVrms
PSRR 72dB @1kHz
Quiescent Current 170µA
Shutdown Current 0.5µA
Operating Temperature -40°C to +125°C
Package SOT-23-5 (DBVT suffix)

Features

  • Ultra-low 30µVrms output noise for RF and precision analog
  • 72dB PSRR at 1kHz for excellent supply rejection
  • 150mV dropout voltage at full 200mA load
  • 0.5µA shutdown current for battery conservation
  • Integrated NMOS pass element for fast transient response
  • Thermal shutdown and current limit protection

Applications

  • RF transceiver and VCO power supply
  • PLL and clock generator clean power rail
  • ADC/DAC reference voltage regulation
  • Low-noise sensor signal conditioning supply

The TPS73025DBVT from Texas Instruments is a 2.5V fixed-output, 200mA ultra-low-noise LDO regulator optimized for noise-sensitive applications. With only 30µVrms output noise and 72dB PSRR at 1kHz, it provides an exceptionally clean power rail for RF transceivers, PLLs, VCOs, and high-resolution ADCs. The 150mV dropout voltage at full load allows operation from a 2.7V minimum input, while the 0.5µA shutdown current preserves battery life in portable applications. The SOT-23-5 package enables compact layout in space-constrained designs.

The TPS73025DBVT uses an NMOS pass transistor in a source-follower configuration, which provides lower output impedance and faster transient response than PMOS-pass LDOs. The error amplifier compares a fraction of the output voltage with a precision bandgap reference, driving the NMOS gate to maintain 2.5V regulation. The NMOS architecture inherently provides high PSRR because the gate-source voltage is referenced to the output, not the input. A dedicated noise-reduction pin (NR) allows connecting an external capacitor to the bandgap reference, filtering reference noise and achieving 30µVrms output noise. The fast loop response is achieved by the low output impedance of the NMOS source follower.

Pin Name Description
1 IN Input supply (2.7-5.5V)
2 GND Ground
3 EN Enable input (active high)
4 NR Noise reduction (external cap to GND)
5 OUT Regulated 2.5V output
  • RF transceiver and VCO low-noise power supply
  • PLL and crystal oscillator clean reference rail
  • High-resolution ADC/DAC reference voltage source
  • Precision sensor signal conditioning supply
Model Manufacturer Vout Noise PSRR
TPS73033DBVT TI 3.3V 30µVrms 72dB
ADM7150-2.5 ADI 2.5V 1µVrms 90dB
LP5907-2.5 TI 2.5V 6.5µVrms 85dB
NCP512-2.5 onsemi 2.5V 35µVrms 70dB
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Tel / WhatsApp: +86 13760382860

Service & Packaging

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Tel / WhatsApp: +86 13760382860
Address: Room 2919, Guoli Building, Huaqiang North, Futian District, Shenzhen, Guangdong, China
 

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