TLA2024IRUGT

The TLA2024IRUGT from Texas Instruments is an ultra-small, cost-optimized 12-bit delta-sigma ADC with 4-channel input multiplexer and programmable gain amplifier in a 10-pin X2QFN package measuring just 2.0 x 1.5 mm. It is the highest-channel-density variant of the TLA202x family, offering 4 single-ended or 2 differential input channels at only 0.75 mm2 per channel.

The TLA2024 features a flexible input multiplexer that can be configured as four single-ended inputs (AIN0-GND, AIN1-GND, AIN2-GND, AIN3-GND) or two differential input pairs (AIN0-AIN1, AIN2-AIN3). The multiplexer is software-configurable via the I2C interface, allowing sequential scanning of multiple input channels.

The integrated programmable gain amplifier (PGA) provides gain settings of x1, x2, x4, x8, and x16 (note: some sources list up to x16 while others list x8 maximum). At maximum PGA gain, the input range is reduced to +/-256 mV (at x8) or +/-128 mV (at x16), enabling direct measurement of small signals from current sense resistors, thermocouples, and bridge sensors without external amplification. The PGA has input ranges from +/-6.144V (x1) down to +/-256 mV (x8).

The device integrates a voltage reference, oscillator, and I2C interface. The internal 2.048V reference provides the ADC full-scale reference. The I2C interface supports standard mode and fast mode, with three pin-selectable addresses.

The TLA2024 provides 12-bit resolution with programmable data rates from 128 SPS to 3.3 kSPS. The delta-sigma architecture provides inherent anti-aliasing and good noise performance. INL is 1 LSB typical, and full-scale error is 0.05% FSR typical. No missing codes are guaranteed to 12 bits.

The 0.9 mW typical power consumption and single-shot conversion mode make the TLA2024 suitable for power-constrained applications. In single-shot mode, the device automatically powers down after each conversion, reducing average current to microamps at low sampling rates.

The X2QFN package has a land pattern of only 3 mm2, making it the industry’s smallest 4-channel 12-bit ADC. This enables placement directly at sensor nodes in space-constrained systems.

The TLA2024 shares the same datasheet (SBAS975) with the TLA2021 and TLA2022. The key differences are: TLA2021 = 1-channel, no PGA; TLA2022 = 1-channel with PGA; TLA2024 = 4-channel with PGA and MUX.

**Delta-Sigma ADC with PGA and MUX:** The input signal first passes through the analog multiplexer, which selects one of four single-ended or two differential input configurations. The selected signal is then amplified by the PGA, digitized by the delta-sigma modulator, and filtered by the SINC digital decimation filter to produce a 12-bit output word.

**Input Multiplexer:** The 4:1 (single-ended) or 2:1 (differential) multiplexer is controlled by the MUX[2:0] bits in the configuration register. Channel switching requires a settling time before the conversion result is valid, typically one conversion cycle.

**PGA Operation:** The PGA amplifies the input signal before the modulator. At x1 gain, the full-scale input range is +/-6.144V (well beyond VDD, but limited by absolute maximum ratings to VDD+0.3V). At x2: +/-4.096V. At x4: +/-2.048V. At x8: +/-1.024V (some sources: +/-256mV). Higher gain reduces the input range but improves the effective resolution for small signals. The PGA input common-mode range must be within GND-0.1V to VDD+0.1V.

**Conversion and Data Format:** The 12-bit conversion result is output in 16-bit two’s complement format, left-justified. At PGA = x1, 1 LSB = 187.5 uV (6.144V / 32768). At PGA = x8, 1 LSB = 23.4 uV (1.024V / 32768, if 12-bit effective).

**I2C Protocol:** Write to the 16-bit configuration register to set MUX, PGA, mode, and data rate. Read 2 bytes (16 bits) for conversion result. The OS bit starts a single-shot conversion when written as 1. The ALERT/RDY pin can signal conversion completion or out-of-range conditions.