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CD4069UBM96

Hex CMOS unbuffered inverter, 3-18V, single-stage, high gain, for oscillators/amplifiers, SOIC-14

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Manufacturer Part：

CD4069UBM96

Package：

SOIC-14 (8.65 x 3.91 x 1.58mm)

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Description

Product Overview

The CD4069UBM96 is a CMOS hex unbuffered inverter from Texas Instruments with 3V to 18V supply operation. The UB (unbuffered) designation means each inverter uses a single CMOS inverter stage rather than the multi-stage buffered output of the CD4069B. This provides higher gain at the threshold, making it suitable for linear amplifier and oscillator applications. The M96 suffix denotes SOIC-14 tape-and-reel packaging rated for -55°C to +125°C.

Key Specifications

Logic Function Hex Unbuffered Inverter (Y = Ā × 6)
Supply Voltage 3V to 18V
Propagation Delay 25ns typ @ 10V (unbuffered, lower than buffered)
Output Drive ±1mA @ 5V; ±3.4mA @ 10V
Quiescent Current 20µA max @ 20V
Input Current 1µA max @ 18V over temperature
Transition Time 30ns typ @ 10V
Type Unbuffered (single-stage inverter)
Output Type Push-Pull CMOS
Package SOIC-14 (8.65 x 3.91mm)
Operating Temperature -55°C to +125°C

Features

  • Unbuffered (single-stage) inverter for linear applications
  • 3V to 18V wide supply range
  • High gain at threshold — ideal for amplifiers
  • Standardized symmetrical output characteristics
  • Low quiescent current: 20µA max @ 20V
  • Maximum input current: 1µA @ 18V over temperature
  • No limit on input rise and fall times (unbuffered)
  • Suitable for both logic and linear (analog) applications
  • Pin-compatible with CD4069B (buffered version)

Applications

  • Crystal oscillators (linear operation)
  • RC oscillators and clock generators
  • Linear amplifiers (bias in threshold region)
  • Logic inversion in CMOS systems
  • Pulse shaping and conditioning
  • Analog signal processing with CMOS inverters

The CD4069UBM96 is a CMOS hex unbuffered inverter from Texas Instruments, part of the CD4000UB logic family. Unlike the buffered CD4069B, each inverter uses a single CMOS inverter stage (one PMOS and one NMOS transistor) without the additional gain stages. This unbuffered architecture provides a smooth, high-gain transfer characteristic around the switching threshold, making each channel suitable for linear operation as a high-gain inverting amplifier. When biased at its threshold voltage (approximately VDD/2), the inverter operates in its linear region with a voltage gain of 20-50, depending on VDD. This unique capability makes the CD4069UB the go-to device for CMOS crystal oscillators, RC oscillators, and linear amplifier circuits where a standard logic inverter would be too nonlinear.

Each of the six unbuffered inverters consists of a single complementary pair (one PMOS and one NMOS transistor). When the input is below the threshold (~VDD/2), the PMOS is ON and the NMOS is OFF, pulling the output to VDD. When the input is above threshold, the NMOS is ON and PMOS is OFF, pulling the output to VSS. Near the threshold, both transistors are partially ON, and the inverter operates in its linear (amplifying) region. The voltage gain in this region can exceed 40, making it useful as a linear amplifier when properly biased with feedback. For oscillator applications, a crystal is connected between input and output of one channel with a feedback resistor (1-10MΩ) to bias the inverter in its linear region. The unbuffered design ensures a single-pole transfer function, essential for stable oscillator operation. The remaining five channels can be used as normal logic inverters or additional linear stages.

Pin Name Description
1 1A Input, gate 1
2 1Y Inverted output, gate 1
3 2A Input, gate 2
4 2Y Inverted output, gate 2
5 3A Input, gate 3
6 3Y Inverted output, gate 3
7 VSS Ground (0V)
8 4Y Inverted output, gate 4
9 4A Input, gate 4
10 5Y Inverted output, gate 5
11 5A Input, gate 5
12 6Y Inverted output, gate 6
13 6A Input, gate 6
14 VDD Positive supply (3V to 18V)
  • Crystal Oscillator ( Pierce Topology ): Connect a crystal between the input and output of one inverter. Add a 1-10MΩ feedback resistor from output to input to bias the inverter in its linear region. Small capacitors (15-33pF) from each side of the crystal to VSS set the load capacitance. The unbuffered inverter provides linear amplification with the correct phase shift (180°) for oscillation. A second inverter buffers the oscillator output to prevent loading.
  • Linear Inverting Amplifier: Bias one inverter at its threshold using a large feedback resistor (1MΩ) from output to input. Apply an AC signal through a coupling capacitor and series resistor. The voltage gain equals the ratio of feedback resistance to input resistance (Av = -Rf/Rin). Operating at VDD=10V, the inverter provides 30-40dB of gain in its linear region, useful for simple audio or sensor signal amplification.
  • RC Oscillator: Use two unbuffered inverters in a ring with an RC network for frequency determination. The unbuffered stages provide the gain needed for oscillation while the RC sets the frequency. The remaining four channels are available for wave shaping the output or other logic functions.
Model Type VDD Key Difference
CD4069BM96 Buffered 3-18V Buffered outputs, NOT for linear use
74HCU04D Unbuffered 2-6V Nexperia, low-voltage unbuffered
SN74LVCU04APWR Unbuffered 1.65-5.5V TI, low-voltage unbuffered hex
HEF4069UBT Unbuffered 3-15V Nexperia, similar CD4000
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