TPS54360DDAR

The TPS54360DDAR is a 60-V, 3.5-A step-down DC-DC converter from Texas Instruments with an integrated high-side N-channel MOSFET (92 mΩ). It is designed for 12-V, 24-V, and 48-V industrial, automotive, and communications power systems where a compact, efficient, wide-input-range buck converter is needed.

The device uses peak current-mode control, which simplifies external loop compensation and provides predictable transient response. The switching frequency is programmable from 100 kHz to 2.5 MHz via a single external resistor on the RT/CLK pin, allowing designers to trade off efficiency versus inductor size. An external clock can also drive the RT/CLK pin for synchronization with other converters in the system.

At light loads, the Eco-mode pulse-skipping operation reduces the quiescent current to 146 µA (typical), significantly extending battery life in always-on or standby applications. In shutdown (EN pin low), the supply current drops to 2 µA. The internal BOOT recharge FET maintains low dropout at light loads without requiring an external bootstrap capacitor refresh.

The adjustable UVLO threshold (default 4.3 V rising) can be raised using two external resistors on the EN pin with built-in hysteresis current (3.4 µA typ), enabling precise power-up sequencing. Internal soft start (1.5 ms at 500 kHz) prevents inrush current and output overshoot.

Protection features include accurate cycle-by-cycle current limit (5.5 A typ), thermal shutdown (176°C), output overvoltage protection, and frequency foldback during overload. The device survives automotive load dump pulses up to 65 V per ISO 7637.

The HSOIC-8 PowerPAD package provides a low junction-to-case thermal resistance (3.6°C/W θJCbot) and is rated for operation from -40°C to 125°C ambient (150°C junction). The PowerPAD must be soldered to the PCB ground plane for proper thermal performance.

**Power Stage and Current-Mode Control:** The TPS54360 integrates a high-side N-channel MOSFET (92 mΩ) and operates as a peak current-mode buck converter. The error amplifier compares the FB pin voltage with the 0.8-V internal reference and drives the COMP pin. The PWM comparator compares the COMP voltage with the sensed switch current to determine the on-time. Current-mode control provides inherent line rejection, cycle-by-cycle current limiting, and simple Type-II compensation.

**Eco-mode (Pulse Skip):** When the load current drops below the pulse-skip threshold, the converter enters Eco-mode. The high-side MOSFET stops switching and the output coasts down until FB falls below the reference, at which point a single pulse is delivered. This eliminates continuous switching losses, reducing quiescent current to 146 µA. The BOOT recharge FET ensures the bootstrap capacitor stays charged during skip mode.

**Frequency and Synchronization:** The switching frequency is set by an external resistor from RT/CLK to GND (200 kΩ = 500 kHz). An external clock on RT/CLK overrides the resistor setting; the internal PLL locks within 78 µs. Frequency foldback reduces the switching frequency to 1/4 of the set value during overcurrent, reducing MOSFET thermal stress.

**UVLO and Enable:** The EN pin serves dual purpose: pulling it below 1.2 V shuts down the converter (2 µA Iq), while external resistors set a custom UVLO threshold. The internal 3.4-µA hysteresis current source creates programmable UVLO hysteresis without a third resistor.

**Protection:** Cycle-by-cycle current limit (5.5 A) protects the MOSFET. Thermal shutdown at 176°C with 12°C hysteresis. OVP on the FB pin triggers if output exceeds 109% of set point. Frequency foldback activates during sustained overcurrent.