TK100E10N1

The TK100E10N1 from Toshiba is a 100V N-channel power MOSFET that uses Toshibas U-MOS VIII-H trench-gate technology to achieve extremely low on-resistance (2.8 mOhm typical) in a standard TO-220 through-hole package. It is designed for high-current switching applications in DC-DC converters, motor drives, and power supplies where low conduction losses and fast switching are critical.

The U-MOS VIII-H technology represents Toshibas 8th generation trench-gate MOSFET platform optimized for high-voltage (60-150V) applications. The trench-gate structure creates vertical channels in the silicon, allowing much higher channel density than planar MOSFETs. This results in lower RDS(on) per unit die area, enabling the 3.4 mOhm maximum RDS(on) specification at VGS=10V in a die that fits within the TO-220 package thermal constraints.

The 100V rating makes this MOSFET suitable for 48V automotive systems (12V battery with 4x margin), 24V and 48V industrial power supplies, and telecom -48V systems. The 2.8 mOhm RDS(on) means that at 50A continuous current, the conduction loss is only 7W (I2R = 502 x 0.0028), which is manageable with a modest heat sink. At 100A, the conduction loss rises to 28W, requiring a more substantial thermal solution.

The total gate charge of 140 nC is relatively high due to the large die size required for the low RDS(on). This gate charge determines the switching loss and the gate driver power requirement. For a switching frequency of 100 kHz with 10V gate drive, the gate driver power dissipation is Qg x VGS x f = 140nC x 10V x 100kHz = 0.14W, which is modest. However, the switching transitions (32ns rise, 45ns fall) contribute to switching losses that increase with frequency, making this MOSFET best suited for applications below 200-300 kHz.

The avalanche energy rating of 222 mJ (single pulse) and avalanche current of 100A indicate that the TK100E10N1 can safely absorb energy from inductive load kickback during unclamped switching events. This is important in motor drive and solenoid driver applications where inductive energy can be substantial.

The body diode reverse recovery time of 93 ns and reverse recovery charge of 220 nC are moderate values that affect efficiency in bridge topologies (half-bridge, full-bridge, synchronous buck) where the body diode conducts during the dead-time interval. For applications requiring faster body diode recovery, consider MOSFETs specifically optimized for synchronous rectification or use external Schottky diodes in parallel with the body diode.

The package current rating of 100A (vs 207A silicon rating) reflects the limitation of the TO-220 lead frame and bond wires. For applications requiring more than 100A continuous current, a TO-247 or D2PAK package with heavier lead frame is recommended. The 255W power dissipation rating at TC=25C requires an infinite heat sink; practical thermal design must account for the heat sink thermal resistance and ambient temperature.

The TK100E10N1 operates as an N-channel enhancement mode power MOSFET using U-MOS VIII-H trench-gate technology.

U-MOS VIII-H Trench-Gate Technology: The U-MOS VIII-H (8th generation High-voltage) technology uses a vertical trench-gate structure where gate electrodes are formed in deep trenches etched into the silicon. The current flows vertically from the drain (back of the die) through the drift region, through the inversion channel on the trench sidewalls, to the source (top of the die). This vertical structure provides several advantages: (1) the channel is formed on the vertical sidewalls of the trench, providing high channel density and low channel resistance; (2) the current flows vertically, eliminating the lateral current crowding that occurs in planar MOSFETs; (3) the cell pitch can be made very small, maximizing the number of cells per unit area. The result is extremely low RDS(on) per unit die area.

Drift Region and Voltage Rating: The 100V voltage rating is determined by the thickness and doping of the N-type drift region between the P-body and the N+ substrate. When VDS is applied (drain positive), the P-N junction between the P-body and the N-drift region is reverse-biased, and the depletion region extends into the drift region. The drift region must be thick enough and lightly doped enough to sustain 100V without breakdown, but this increases the drift region resistance, which is a major component of RDS(on). The U-MOS VIII-H technology optimizes the drift region profile (including a charge-coupled structure or resurf technique) to minimize drift resistance while maintaining the 100V breakdown voltage.

Switching Operation: When a positive voltage above VGS(th) (2.0-4.0V) is applied to the gate, an inversion layer (N-type channel) forms on the P-body surface along the trench sidewalls, connecting the N+ source to the N-drift region. Current flows from drain to source (conventional direction). When the gate voltage is removed (VGS = 0V), the inversion layer disappears, and the current stops. The switching speed is limited by the time required to charge and discharge the gate capacitance (Ciss = 8,800 pF). The gate driver must supply the gate charge (Qg = 140 nC) during turn-on and absorb it during turn-off.

Avalanche Operation: When an inductive load is switched off, the drain voltage can rise above the breakdown voltage (BVdss) due to the inductive kick (V = L x dI/dt). In avalanche mode, the MOSFET conducts current through the parasitic NPN transistor formed by the N+ source, P-body, and N-drift region. The TK100E10N1 is 100% avalanche tested, meaning each device has been verified to survive a specified avalanche event without degradation. The single-pulse avalanche energy (EAS = 222 mJ) is the maximum energy the device can absorb in a single event without damage.

Body Diode: The P-body to N-drift region junction forms an inherent body diode with the anode at the source and the cathode at the drain. When VDS is negative (source above drain), the body diode is forward-biased and conducts current. In half-bridge and synchronous buck converters, the body diode conducts during the dead-time when both MOSFETs are off. The body diode reverse recovery (trr = 93 ns, Qrr = 220 nC) creates switching losses when the opposing MOSFET turns on and forces the body diode to recover.