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LAN8720AI-CP

10/100 Ethernet PHY, RMII, industrial, QFN-24

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Manufacturer Part：

LAN8720AI-CP

Package：

QFN-24 (4x4mm)

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Description

Product Overview

The LAN8720AI-CP from Microchip is the industrial-grade (-40~85C) version of the LAN8720A 10/100 Ethernet PHY with RMII interface and HP Auto-MDIX in QFN-24.

Key Specifications

Package QFN-24 (4x4mm)

Features

  • See datasheet for complete specifications
  • Industry-standard package

Applications

  • Industrial control
  • Consumer electronics
  • Communication equipment
  • Power management

The LAN8720AI-CP from Microchip is the industrial-grade (-40~85C) version of the LAN8720A 10/100 Ethernet PHY with RMII interface and HP Auto-MDIX in QFN-24.

The LAN8720AI-CP is a 10/100 Ethernet PHY (Physical Layer) transceiver from Microchip in QFN-24, with RMII (Reduced Media Independent Interface) to the MAC layer. The -I suffix denotes industrial temperature range (-40C to +85C). The PHY implements the physical layer of IEEE 802.3: it encodes/decodes 4B/5B data, scrambles/descrambles, and drives/receives differential signals on the twisted-pair cable via the TXP/TXN and RXP/RXN pins. An external isolation transformer (magnetics module, typically integrated in the RJ-45 jack) couples the PHY to the cable and provides galvanic isolation. The 25MHz crystal or oscillator on XTAL1/XTAL2 provides the reference clock; the REF_CLK output (50MHz for RMII) is derived internally and provided to the MCU’s MAC controller. The RMII interface uses 7 signals (TXD0/1, TXEN, RXD0/1, CRS_DV, REF_CLK) at 50MHz clock, reducing pin count vs the 16-signal MII interface. The MDIO/MDC management interface allows the MCU to read/write the PHY’s 32 internal registers: configure speed (10/100), duplex (half/full), auto-negotiation, loopback, and read link status. The nINT pin can generate interrupts on link state changes. The RBIAS pin connects a 12.1k-ohm resistor to GND to set the PHY transmit bias current. Auto-negotiation detects the link partner’s capabilities and selects the highest common speed/duplex setting. The device consumes 45mW typical at 100Mbps and supports IEEE 802.3az Energy Efficient Ethernet (idle power <10mW).

Pin Name Type Function
1 VDDCR Power Internal 1.2V regulator output (connect 2.2uF + 470nF decoupling)
2 VDDIO Power I/O supply (1.6-3.6V, typically 3.3V)
3 RXD1/MODE1 I/O RMII receive data 1 / Mode select 1 (strap at reset)
4 RXD0/MODE0 I/O RMII receive data 0 / Mode select 0 (strap at reset)
5 VDDA Power Analog supply (3.3V, connect to VDDIO via ferrite bead)
6-8 TXEN/TXD0/TXD1 Output RMII transmit enable/data
9-14 MDC/MDIO/CRS_DV/REF_CLK/nRST/nINT I/O MDIO management, carrier sense, reference clock, reset, interrupt
15-24 TXP/TXN/RXP/RXN/XTAL1/XTAL2/RBIAS/VDD/EPAD RF/Power Ethernet PHY, crystal, bias, power, thermal pad
  • Industrial control
  • Consumer electronics
  • Communication equipment
  • Power management
    • Manufacturer Part Number Package Notes
    Microchip LAN8720A-CP-TR QFN-24 Commercial grade version
    Microchip LAN8742A-CZ-TR QFN-24 Improved version with energy detect, IEEE 802.3az
    Texas Instruments DP83848CVV LQFP-48 10/100 PHY, industrial temp, MII/RMII
    Realtek RTL8201F-VB-CG QFN-24 10/100 PHY, RMII, very low cost
    Analog Devices ADIN1300BCPZ QFN-40 Gigabit Ethernet PHY, RGMII, industrial
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