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SN74LVC1G14DCKR


Single Schmitt-trigger inverter, 1.65-5.5V, hysteresis, 4.6ns tpd, ±24mA, OVT inputs, SC70-5

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Pieza del fabricante:

SN74LVC1G14DCKR

Paquete:

SC70-5 / SOT-353 (2.0 x 1.25 x 1.0mm)

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Descripción

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The SN74LVC1G14DCKR is a single Schmitt-trigger inverter from Texas Instruments for 1.65V to 5.5V operation. It performs Y = Ā with different positive-going (VT+) and negative-going (VT–) input thresholds, providing hysteresis (ΔVT) that makes it tolerant to slow, noisy, or slowly-slewing input signals. Features 5.5V overvoltage-tolerant inputs, 4.6ns max tpd, ±24mA drive, and Ioff in SC70-5 package.

Especificaciones

Logic Function Schmitt-Trigger Inverter (Y = Ā)
Tensión de alimentación 1.65V to 5.5V
Propagation Delay (tpd) 4.6ns max @ 3.3V
Input Hysteresis (ΔVT) 0.22V typ @ 3.3V; 0.36V typ @ 5V
Positive-Going Threshold (VT+) 1.63V typ @ 3.3V
Negative-Going Threshold (VT–) 1.41V typ @ 3.3V
Output Drive ±24mA @ 3.3V; ±32mA @ 4.5V
Quiescent Current (ICC) 10µA max
Input Voltage Tolerance Up to 5.5V (overvoltage tolerant)
Ioff Support Yes
ESD Protection 2000V HBM, 1000V CDM
Paquete SC70-5 / SOT-353 (2.0 x 1.25mm)
Temperatura de funcionamiento -40°C to +125°C

Características

  • Schmitt-trigger inputs with hysteresis for noise immunity
  • 1.65V to 5.5V VCC operation
  • 5.5V overvoltage-tolerant inputs
  • 4.6ns max propagation delay at 3.3V
  • 10µA max quiescent current
  • ±24mA output drive at 3.3V
  • Ioff for partial-power-down support
  • NanoFree package technology available
  • Ideal for signal conditioning of slow or noisy edges

Aplicaciones

  • Square-wave generation from slow analog signals
  • Switch debouncing
  • Power-on reset circuits
  • Sensor signal conditioning (slow edges)
  • Oscillator circuits with RC feedback
  • Level translation with noise rejection

The SN74LVC1G14DCKR is a single Schmitt-trigger inverter from Texas Instruments designed for 1.65V to 5.5V operation. Unlike standard inverters, it features Schmitt-trigger inputs with different thresholds for rising (VT+) and falling (VT–) signals, providing hysteresis (ΔVT) that makes the output switch cleanly even with slow, noisy, or slowly-slewing input waveforms. This eliminates the output oscillation that can occur with standard CMOS inputs driven by slow edges. The device performs Y = Ā and supports 5.5V overvoltage-tolerant inputs, Ioff partial-power-down isolation, and ±24mA output drive at 3.3V. Available in SC70-5 and ultra-small DPW (0.8×0.8mm) packages.

The SN74LVC1G14 uses a CMOS inverter core with Schmitt-trigger input stage. The input stage has two switching thresholds: a higher threshold VT+ for positive-going signals and a lower threshold VT– for negative-going signals. The difference ΔVT = VT+ – VT– is the hysteresis voltage (typically 0.22V at 3.3V VCC). When the input rises through VT+, the output switches low. When the input falls through VT–, the output switches high. Between VT+ and VT–, the output holds its previous state. This hysteresis action rejects noise on slowly-changing input signals — a standard inverter without hysteresis would oscillate when its input lingers near the single switching threshold. The Ioff circuitry disconnects the output when VCC = 0V, allowing the device to be used in systems with partial power-down where some signals may remain active while the gate’s supply is removed.

Pin Nombre Descripción
1 A Schmitt-trigger input
2 GND Suelo
3 NC Sin conexión
4 Y Inverted output (Y = Ā)
5 VCC Supply voltage (1.65V to 5.5V)
  • Switch Debounce: Connect a mechanical switch between input A and VCC, with a pull-down resistor to GND. The Schmitt-trigger hysteresis ensures the output switches cleanly once, eliminating the multiple transitions caused by contact bounce. A small capacitor (10nF) across the switch further filters bounce. The output provides a clean logic level to the MCU interrupt pin.
  • Power-On Reset (POR): Create a simple POR using an RC network on the input. A capacitor from input to GND and a resistor from VCC to input creates a rising voltage that eventually crosses VT+, generating a clean low-to-high transition on the inverted output. The hysteresis prevents glitches during the slow RC ramp.
  • Sensor Signal Conditioning: Condition the slowly-varying output of a resistive sensor (thermistor, LDR) by connecting it through a voltage divider to the input. The Schmitt trigger squares the slow analog signal into a clean digital output, with the hysteresis setting the switching thresholds and providing noise immunity. No ADC is needed for threshold detection.
Modelo Función Diferencia clave
SN74LVC1G14DBVR Schmitt inverter SOT-23-5 package, larger
SN74LVC2G14DCKR Dual Schmitt inverter 2 channels in same package size
74AUP1G14GF Schmitt inverter Nexperia, 0.8V min, ultra-low power
NC7SZ14P5X Schmitt inverter Renesas/IDT, similar specs
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