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SN74LS85N

4-bit magnitude comparator, A>B/A=B/A<B, cascading, PDIP-16

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Pieza del fabricante：

SN74LS85N

Paquete：

PDIP-16 (19.3 x 6.35 x 4.57mm, 2.54mm pitch, through-hole)

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Descripción

Productos

The SN74LS85N from Texas Instruments is a 4-bit magnitude comparator that determines whether one 4-bit binary number is greater than, less than, or equal to another, with cascading inputs for comparing numbers wider than 4 bits in a 16-pin PDIP package.

Especificaciones

Función 4-bit magnitude comparator
Logic Family LS (Low-power Schottky)
Tensión de alimentación 4.75V to 5.25V
Inputs A0-A3, B0-B3 (two 4-bit numbers)
Outputs A>B, A=B, A
Cascade Inputs A>B, A=B, A
Retardo de propagación 24ns typical (data to output)
Temperatura de funcionamiento 0°C to +70°C
Paquete PDIP-16 (19.3 x 6.35mm)

Características

  • Compares two 4-bit binary or BCD numbers
  • Three outputs: A>B, A=B, A
  • Cascading inputs for comparing 8, 12, 16+ bits
  • Only one output HIGH at a time

Aplicaciones

  • Address comparison
  • Digital magnitude comparison
  • Process control (temperature, pressure limits)
  • Sorting and ranking logic

The SN74LS85N from Texas Instruments compares two 4-bit binary numbers (A[3:0] and B[3:0]) and indicates whether A>B, A=B, or AB, A=B, A<B) allow multiple 7485 chips to compare numbers wider than 4 bits. For a standalone 4-bit comparison, the cascade inputs must be set: AB=LOW (indicating that the lower-order bits are equal). For 8-bit comparison, the lower-order 7485’s outputs connect to the higher-order 7485’s cascade inputs. The comparison is performed from the most significant bit downward: if A3>B3, then A>B regardless of lower bits; if A3=B3, the comparison proceeds to A2 vs B2, and so on. If all four bits are equal, the result depends on the cascade inputs. The N suffix denotes the PDIP-16 through-hole package.

The SN74LS85N performs comparison starting from the MSB: if A3>B3 → A>B output HIGH; if A3<B3 → AB output reflects the cascade A>B input; A<B output reflects the cascade AB=LOW, cascade A<B=LOW. This tells the comparator that the 'lower 0 bits' are equal, so if the 4 data bits are also equal, A=B goes HIGH. For 8-bit comparison: lower 7485 compares A[3:0] vs B[3:0]; its three outputs connect to the upper 7485's cascade inputs; the upper 7485 compares A[7:4] vs B[7:4]. If the upper bits are unequal, they determine the result; if equal, the cascade inputs (from the lower chip) decide. For 12-bit: three chips cascade, and so on.

Pin Nombre Tipo Descripción
1 B3 Entrada Input B bit 3 (MSB)
2 A<B Entrada Cascade input: A less than B
3 A=B Entrada Cascade input: A equals B
4 A>B Entrada Cascade input: A greater than B
5 A>B Salida Output: A greater than B (active HIGH)
6 A=B Salida Output: A equals B (active HIGH)
7 A<B Salida Output: A less than B (active HIGH)
8 GND Potencia Suelo
9 B0 Entrada Input B bit 0 (LSB)
10 A0 Entrada Input A bit 0 (LSB)
11 B1 Entrada Input B bit 1
12 A1 Entrada Input A bit 1
13 A2 Entrada Input A bit 2
14 B2 Entrada Input B bit 2
15 A3 Entrada Input A bit 3 (MSB)
16 VCC Potencia Supply (5V)
  • 4-Bit Compare: Two 4-bit counters → A[3:0] and B[3:0]; cascade inputs: A=B=HIGH, A>B=LOW, A<B=LOW; outputs indicate which counter is ahead
  • 8-Bit Compare: Lower 7485 compares bits 0-3; outputs → upper 7485 cascade inputs; upper compares bits 4-7; upper outputs give 8-bit result
  • Alarm Threshold: ADC output → A[3:0]; threshold set by switches → B[3:0]; A>B output triggers alarm when reading exceeds threshold
  • Sort: Compare two numbers; swap if A>B using multiplexers; building block for sorting networks
Modelo Fabricante Diferencia clave Paquete Supply
74LS85N TI/Nexperia Original TTL version with 5V-only supply, typical propagation delay 10-15ns DIP-16 5V TTL
74LS85D TI/Nexperia Surface-mount SOIC version of LS with identical logic function SOIC-16 5V TTL
74HC85D TI/Nexperia CMOS version with wide 2-6V supply range, lower power consumption and higher noise immunity SOIC-16 2-6V CMOS
74HC85N TI/Nexperia Through-hole DIP version of HC family for prototyping and repair DIP-16 2-6V CMOS
74HCT85D TI/Nexperia CMOS with TTL-compatible input levels, ideal for mixing with LS devices at 5V SOIC-16 4.5-5.5V TTL-in
74HCT85N TI/Nexperia Through-hole DIP version of HCT family for prototyping and repair DIP-16 4.5-5.5V TTL-in

The 7485 is a 4-Bit Magnitude Comparator. Family variants span from the original LS TTL (5V only) to modern LVC/AUP (down to 0.8V). HC and HCT versions offer 2-6V CMOS operation with HCT providing TTL-compatible input thresholds for mixed 5V systems. CD4000-series equivalents offer the widest 3-18V supply range at the cost of lower switching speed. DIP packages (N suffix) are through-hole; SOIC (D suffix) and TSSOP are surface-mount.

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