Inicio > Circuitos integrados IC > SN74LS42N

SN74LS42N

BCD-to-decimal decoder, 4-in/10-out, active-LOW, invalid rejection, PDIP-16

3000

Inventario efectivo

Ir a la consulta

Image for reference only

Pieza del fabricante：

SN74LS42N

Paquete：

PDIP-16 (19.3 x 6.35 x 4.57mm, 2.54mm pitch, through-hole)

Marca：

Categorías de productos：

Circuitos integrados IC, Circuitos integrados de interfaz

Otras recomendaciones que pueden interesarle.

SII9396SCNUC-BAR

IS43TR16256BL-125KBLI

Descripción

Productos

The SN74LS42N from Texas Instruments is a 4-line BCD to 10-line decimal decoder with active-LOW outputs. It accepts a 4-bit BCD input and drives one of ten outputs LOW, while all invalid BCD codes (10-15) produce all outputs HIGH — making it both a decoder and a code validator in a 16-pin PDIP package.

Especificaciones

Función	BCD-to-decimal decoder (4-line to 10-line)
Logic Family	LS (Low-power Schottky)
Tensión de alimentación	4.75V to 5.25V (5V nominal)
Inputs	A0–A3 (4-bit BCD)
Outputs	0–9 (active LOW, mutually exclusive)
Invalid Input Handling	All outputs HIGH for BCD 10–15
Retardo de propagación	15–25ns typical
Output Drive (IOL/IOH)	8mA / -0.4mA
Supply Current	7–13mA typical
Temperatura de funcionamiento	0°C to +70°C
Paquete	PDIP-16 (19.3 x 6.35mm)

Características

Decodes 4-bit BCD to one-of-ten active-LOW outputs
All outputs HIGH for invalid input codes (10-15)
Can serve as 3-line-to-8-line decoder (using A3 as enable)
Can serve as 1-of-8 demultiplexer (A3 as data input)
Input clamp diodes for simplified system design

Aplicaciones

BCD-to-decimal decoding for displays
Address decoding
Code validation (reject invalid BCD)
Demultiplexing

Introducción del producto:SN74LS42N Presentación del producto

The SN74LS42N from Texas Instruments is a BCD-to-decimal decoder that accepts a 4-bit BCD input on pins A0-A3 and activates (drives LOW) one of ten output lines (0-9). Unlike binary decoders like the 74LS138, the 7442 only decodes the ten valid BCD codes (0000-1001); for the six invalid codes (1010-1111), all outputs remain HIGH. This built-in code validation is useful in systems where invalid BCD data must not produce spurious outputs. The active-LOW outputs are compatible with most TTL active-LOW enable inputs, making the 7442 ideal for chip-select decoding. The device can also serve as a 3-line-to-8-line decoder by using A3 as an active-HIGH enable (when A3=LOW, outputs 0-7 decode A0-A2; when A3=HIGH, outputs 0-7 are all HIGH). As a demultiplexer, A3 becomes the data input: the data on A3 is routed to the selected output (0-7) in complemented form. The N suffix denotes the PDIP-16 through-hole package.

Principio de funcionamiento:SN74LS42N Principio de funcionamiento

The SN74LS42N consists of eight inverters and ten 4-input NAND gates. The inverters generate both true and complement of each BCD input bit (A0-A3 and their complements). Each output NAND gate corresponds to one decimal digit and is driven by the combination of inputs that represents that digit in BCD. For example, output 5 (BCD 0101) is driven by a NAND gate with inputs A0, A2′, A1, and A3′. When all four inputs are HIGH (meaning A0=1, A1=0, A2=1, A3=0, i.e., BCD=0101=5), the NAND output goes LOW. For invalid codes (10-15), the NAND gate combinations required don’t exist in the decoder — none of the ten NAND gates have the correct input combination, so all outputs remain HIGH. As a 3-to-8 decoder: tie A3 LOW; A0-A2 select one of outputs 0-7 (LOW); outputs 8-9 always remain HIGH. As a demultiplexer: A3 is the data input; A0-A2 select the output; the selected output follows A3 (inverted), while all other outputs are HIGH.

Descripción de la clavija:SN74LS42N Definición y funciones de las clavijas

Pin	Nombre	Tipo	Descripción
1	0	Salida	Output 0 (active LOW, for BCD 0000)
2	1	Salida	Output 1 (active LOW, for BCD 0001)
3	2	Salida	Output 2 (active LOW, for BCD 0010)
4	3	Salida	Output 3 (active LOW, for BCD 0011)
5	4	Salida	Output 4 (active LOW, for BCD 0100)
6	5	Salida	Output 5 (active LOW, for BCD 0101)
7	6	Salida	Output 6 (active LOW, for BCD 0110)
8	GND	Potencia	Suelo
9	7	Salida	Output 7 (active LOW, for BCD 0111)
10	8	Salida	Output 8 (active LOW, for BCD 1000)
11	9	Salida	Output 9 (active LOW, for BCD 1001)
12	A3	Entrada	BCD input MSB
13	A2	Entrada	BCD input bit 2
14	A1	Entrada	BCD input bit 1
15	A0	Entrada	BCD input LSB
16	VCC	Potencia	Supply (5V)

Application Scenarios:In which products and applications isSN74LS42N usado

BCD Decoding: Counter output (CD4510 or 74LS90) → A0-A3; selected output goes LOW; drives indicator LEDs (active LOW) or enable inputs of other ICs
3-to-8 Decoder: A3 tied LOW; A0-A2 select one of outputs 0-7; outputs 8-9 unused; acts like 74LS138 without enable inputs
Code Validator: BCD data → A0-A3; if any output is LOW, the BCD is valid; if all outputs HIGH, the BCD is invalid (10-15); OR all outputs → active-HIGH error flag
1-of-8 Demux: Serial data on A3; A0-A2 select output; data appears (inverted) on selected output

Alternative Models:What chips are recommended as replacements for SN74LS42N

Modelo	Fabricante	Diferencia clave	Paquete	Supply
74LS42N	TI/Nexperia	Original TTL version with 5V-only supply, typical propagation delay 10-15ns	DIP-16	5V TTL
74LS42D	TI/Nexperia	Surface-mount SOIC version of LS with identical logic function	SOIC-16	5V TTL
74HC42D	TI/Nexperia	CMOS version with wide 2-6V supply range, lower power consumption and higher noise immunity	SOIC-16	2-6V CMOS
74HC42N	TI/Nexperia	Through-hole DIP version of HC family for prototyping and repair	DIP-16	2-6V CMOS
74HCT42D	TI/Nexperia	CMOS with TTL-compatible input levels, ideal for mixing with LS devices at 5V	SOIC-16	4.5-5.5V TTL-in
74HCT42N	TI/Nexperia	Through-hole DIP version of HCT family for prototyping and repair	DIP-16	4.5-5.5V TTL-in

The 7442 is a BCD-to-Decimal Decoder. Family variants span from the original LS TTL (5V only) to modern LVC/AUP (down to 0.8V). HC and HCT versions offer 2-6V CMOS operation with HCT providing TTL-compatible input thresholds for mixed 5V systems. CD4000-series equivalents offer the widest 3-18V supply range at the cost of lower switching speed. DIP packages (N suffix) are through-hole; SOIC (D suffix) and TSSOP are surface-mount.