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SN74LS04N

Hex inverter, 6 NOT gates, LS TTL, 10ns, PDIP-14

20000

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Pieza del fabricante：

SN74LS04N

Paquete：

PDIP-14 (19.3 x 6.35 x 4.57mm, 2.54mm pitch, through-hole)

Marca：

Categorías de productos：

Circuitos integrados IC, Circuitos integrados de interfaz

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Descripción

Productos

The SN74LS04N is a hex inverter from Texas Instruments with six independent NOT gates in a 14-pin PDIP package, using LS (Low-power Schottky) TTL technology.

Especificaciones

Number of Gates	6 (hex inverter)
Logic Family	LS (Low-power Schottky)
Tensión de alimentación	4.75V to 5.25V (5V nominal)
Retardo de propagación	10ns typical
Output Low Current (IOL)	8mA
Output High Current (IOH)	-0.4mA
Supply Current (all gates)	6.1mA typical, 12mA max
Input Voltage (HIGH min)	2.0V
Input Voltage (LOW max)	0.8V
Temperatura de funcionamiento	0°C to +70°C
Paquete	PDIP-14 (19.3 x 6.35mm)

Características

Six independent inverters in one package
LS TTL technology for fast switching
10ns typical propagation delay
Input clamp diodes for undershoot protection
Direct replacement for 7404 and 74LS04
Industry-standard pinout

Aplicaciones

Logic signal inversion
Clock signal complement generation
Active-low to active-high conversion
Simple oscillator with crystal or RC network
Logic buffer with inversion

Introducción del producto:SN74LS04N Presentación del producto

The SN74LS04N from Texas Instruments contains six independent logic inverters (NOT gates) in a 14-pin PDIP through-hole package. Each inverter performs the Boolean function Y = NOT(A), producing a LOW output when the input is HIGH and a HIGH output when the input is LOW. The LS (Low-power Schottky) technology provides 10ns typical propagation delay with only 6.1mA typical supply current for all six gates. Input clamp diodes protect against negative voltage undershoot. The device is a direct replacement for the classic 7404 and 74LS04 from any manufacturer, using the industry-standard pinout where each gate has its input on an odd pin and its output on the adjacent even pin. The N suffix denotes the PDIP-14 through-hole package.

Principio de funcionamiento:SN74LS04N Principio de funcionamiento

Each of the six inverters in the SN74LS04N is a simple single-input logic gate that performs the NOT function. When the input voltage is at a logic HIGH level (above 2.0V), the output drives LOW (typically 0.2V, max 0.4V at 8mA sink). When the input is at a logic LOW level (below 0.8V), the output drives HIGH (typically 3.4V, min 2.7V at -0.4mA source). The totem-pole output stage can actively drive both HIGH and LOW levels, unlike open-collector outputs that require external pull-up resistors. The 10ns propagation delay means the output transitions approximately 10ns after the input crosses the switching threshold. The six gates are completely independent—each can be used for a different function in the circuit. Common configurations include: (1) single inversion, (2) double inversion (two gates in series) as a buffer/delay element, (3) three gates in series for odd inversion + delay, and (4) two gates with feedback for a simple oscillator.

Descripción de la clavija:SN74LS04N Definición y funciones de las clavijas

Pin	Nombre	Tipo	Descripción
1	1A	Entrada	Gate 1 input
2	1Y	Salida	Gate 1 output (inverted)
3	2A	Entrada	Gate 2 input
4	2Y	Salida	Gate 2 output (inverted)
5	3A	Entrada	Gate 3 input
6	3Y	Salida	Gate 3 output (inverted)
7	GND	Potencia	Suelo
8	4Y	Salida	Gate 4 output (inverted)
9	4A	Entrada	Gate 4 input
10	5Y	Salida	Gate 5 output (inverted)
11	5A	Entrada	Gate 5 input
12	6Y	Salida	Gate 6 output (inverted)
13	6A	Entrada	Gate 6 input
14	VCC	Potencia	Supply (4.75V to 5.25V)

SN74LS04N uses the PDIP-14 package with standard hex inverter pinout: VCC at Pin 14, GND at Pin 7. Six independent inverters: Inv 1 (Pin 1 in, Pin 2 out), Inv 2 (Pin 3 in, Pin 4 out), Inv 3 (Pin 5 in, Pin 6 out), Inv 4 (Pin 9 in, Pin 8 out), Inv 5 (Pin 11 in, Pin 10 out), Inv 6 (Pin 13 in, Pin 12 out). This is the most widely used pinout for 14-pin hex inverters across all logic families. For Schmitt-trigger version, use SN74LS14N. For open-collector, use SN74LS05N. Propagation delay is typically 10ns for LS technology at 5V supply.

Application Scenarios:In which products and applications isSN74LS04N usado

Signal Inversion: Convert active-HIGH to active-LOW signals for driving active-LOW chip selects or enable pins
Clock Complement: Generate complementary clock for push-pull or H-bridge gate drive
Crystal Oscillator: Two inverters with feedback crystal and capacitors form a Pierce oscillator
RC Oscillator: Two inverters with resistor feedback and RC timing create a simple square-wave generator
Logic Delay: Two gates in series provide ~20ns delay without inversion; useful for timing alignment

Alternative Models:What chips are recommended as replacements for SN74LS04N

Modelo	Fabricante	Diferencia clave	Paquete	Supply
74LS04N	TI/Nexperia	Original TTL version with 5V-only supply, typical propagation delay 10-15ns	DIP-14	5V TTL
74LS04D	TI/Nexperia	Surface-mount SOIC version of LS with identical logic function	SOIC-14	5V TTL
74HC04D	TI/Nexperia	CMOS version with wide 2-6V supply range, lower power consumption and higher noise immunity	SOIC-14	2-6V CMOS
74HC04N	TI/Nexperia	Through-hole DIP version of HC family for prototyping and repair	DIP-14	2-6V CMOS
74HCT04D	TI/Nexperia	CMOS with TTL-compatible input levels, ideal for mixing with LS devices at 5V	SOIC-14	4.5-5.5V TTL-in
74HCT04N	TI/Nexperia	Through-hole DIP version of HCT family for prototyping and repair	DIP-14	4.5-5.5V TTL-in
74AC04D	TI/Nexperia	Advanced CMOS with 2-6V supply and higher output drive current (24mA vs 6mA for HC)	SOIC-14	2-6V CMOS
74AC04N	TI/Nexperia	Through-hole DIP version of AC family for prototyping and repair	DIP-14	2-6V CMOS
74LVC04D	TI/Nexperia	Low-voltage CMOS for 1.65-3.6V modern logic with 24mA output drive and bus-hold inputs	SOIC-14	1.65-3.6V CMOS
74LVC04N	TI/Nexperia	Through-hole DIP version of LVC family for prototyping and repair	DIP-14	1.65-3.6V CMOS
74AUP04D	TI/Nexperia	Ultra-low power CMOS with 0.8-3.6V supply for battery-powered and mobile applications	SOIC-14	0.8-3.6V CMOS
74AUP04N	TI/Nexperia	Through-hole DIP version of AUP family for prototyping and repair	DIP-14	0.8-3.6V CMOS

The 7404 is a Hex Inverter. Family variants span from the original LS TTL (5V only) to modern LVC/AUP (down to 0.8V). HC and HCT versions offer 2-6V CMOS operation with HCT providing TTL-compatible input thresholds for mixed 5V systems. CD4000-series equivalents offer the widest 3-18V supply range at the cost of lower switching speed. DIP packages (N suffix) are through-hole; SOIC (D suffix) and TSSOP are surface-mount.