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SN74LS04N

Hex inverter, LS TTL, 12ns, PDIP-14

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Pieza del fabricante：

SN74LS04N

Paquete：

PDIP-14 (19.3 x 6.35 x 4.57mm, 2.54mm pitch, through-hole)

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Descripción

Productos

The SN74LS04N from Texas Instruments is a hex inverter (six independent NOT gates) with LS TTL technology, 12ns propagation delay, and industry-standard 7404 pinout in a 14-pin PDIP package.

Especificaciones

Number of Gates 6 (hex inverter)
Logic Family LS (Low-power Schottky)
Tensión de alimentación 4.75V to 5.25V (5V nominal)
Retardo de propagación 12ns typical @ 5V
Output Drive (IOL/IOH) 8mA / -0.4mA
Temperatura de funcionamiento 0°C to +70°C
Paquete PDIP-14 (19.3 x 6.35mm)

Características

  • Six independent inverter gates
  • LS TTL technology
  • 12ns typical propagation delay
  • Industry-standard 7404 pinout

Aplicaciones

  • Logic signal inversion
  • Active-HIGH to active-LOW conversion
  • Clock signal buffering and inversion
  • Logic level translation (TTL family)
  • Simple oscillator with RC feedback

The SN74LS04N from Texas Instruments contains six independent inverter (NOT) gates in a 14-pin PDIP package. Each gate performs Y = NOT(A), converting a HIGH input to a LOW output and vice versa. The 7404 is one of the most fundamental logic ICs, used whenever a signal needs to be inverted: converting active-HIGH to active-LOW, generating complementary signals, or constructing oscillators. Six inverters in one package makes the 7404 efficient for systems needing multiple inversions. The N suffix denotes the PDIP-14 through-hole package.

Each inverter in the SN74LS04N performs Y = NOT(A). The truth table is: 0→1, 1→0. The LS TTL inverter uses a multi-emitter input transistor (or diode-clamped input) and a totem-pole output stage. When the input is LOW, the output transistor is off and the pull-up transistor drives the output HIGH. When the input is HIGH, the output transistor is on and the pull-up is off, driving the output LOW. The 12ns propagation delay is the time from input transition to output transition. For a simple RC oscillator, an inverter with feedback resistor (1MΩ from output to input) and a capacitor (100nF from input to ground) creates a relaxation oscillator. However, the 7404 is not a Schmitt trigger, so for noisy or slowly-rising inputs, the 74LS14 (hex Schmitt inverter) is preferred to avoid output oscillation.

Pin Nombre Tipo Descripción
1 1A Entrada Inverter 1 input
2 1Y Salida Inverter 1 output
3 2A Entrada Inverter 2 input
4 2Y Salida Inverter 2 output
5 3A Entrada Inverter 3 input
6 3Y Salida Inverter 3 output
7 GND Potencia Suelo
8 4Y Salida Inverter 4 output
9 4A Entrada Inverter 4 input
10 5Y Salida Inverter 5 output
11 5A Entrada Inverter 5 input
12 6Y Salida Inverter 6 output
13 6A Entrada Inverter 6 input
14 VCC Potencia Supply (4.75V to 5.25V)

SN74LS04N uses the PDIP-14 package with standard hex inverter pinout: VCC at Pin 14, GND at Pin 7. Six independent inverters: Inv 1 (Pin 1 in, Pin 2 out), Inv 2 (Pin 3 in, Pin 4 out), Inv 3 (Pin 5 in, Pin 6 out), Inv 4 (Pin 9 in, Pin 8 out), Inv 5 (Pin 11 in, Pin 10 out), Inv 6 (Pin 13 in, Pin 12 out). This is the most widely used pinout for 14-pin hex inverters, shared by 7404, 74LS04, 74HC04, 74HCT04, and 74AC04. For Schmitt-trigger input version, use SN74LS14N (same pinout, hysteresis on all inputs). For open-collector output, use SN74LS05N. Propagation delay is typically 10ns for LS technology.

  • Signal Inversion: Convert active-HIGH to active-LOW; e.g., invert /CS to CS for active-HIGH peripheral
  • Double Inversion: Two inverters in series = buffer; cleans up signal levels while maintaining polarity
  • RC Oscillator: Feedback resistor + input capacitor creates relaxation oscillator; ~1/(2.2×R×C) frequency
  • Complementary Clock: One inverter generates inverted clock; two outputs available (CLK and /CLK)
  • Level Translation: Convert 3.3V CMOS HIGH to TTL-compatible level through LS04; 5V output
Modelo Fabricante Diferencia clave Paquete Supply
74LS04N TI/Nexperia Original TTL version with 5V-only supply, typical propagation delay 10-15ns DIP-14 5V TTL
74LS04D TI/Nexperia Surface-mount SOIC version of LS with identical logic function SOIC-14 5V TTL
74HC04D TI/Nexperia CMOS version with wide 2-6V supply range, lower power consumption and higher noise immunity SOIC-14 2-6V CMOS
74HC04N TI/Nexperia Through-hole DIP version of HC family for prototyping and repair DIP-14 2-6V CMOS
74HCT04D TI/Nexperia CMOS with TTL-compatible input levels, ideal for mixing with LS devices at 5V SOIC-14 4.5-5.5V TTL-in
74HCT04N TI/Nexperia Through-hole DIP version of HCT family for prototyping and repair DIP-14 4.5-5.5V TTL-in
74AC04D TI/Nexperia Advanced CMOS with 2-6V supply and higher output drive current (24mA vs 6mA for HC) SOIC-14 2-6V CMOS
74AC04N TI/Nexperia Through-hole DIP version of AC family for prototyping and repair DIP-14 2-6V CMOS
74LVC04D TI/Nexperia Low-voltage CMOS for 1.65-3.6V modern logic with 24mA output drive and bus-hold inputs SOIC-14 1.65-3.6V CMOS
74LVC04N TI/Nexperia Through-hole DIP version of LVC family for prototyping and repair DIP-14 1.65-3.6V CMOS
74AUP04D TI/Nexperia Ultra-low power CMOS with 0.8-3.6V supply for battery-powered and mobile applications SOIC-14 0.8-3.6V CMOS
74AUP04N TI/Nexperia Through-hole DIP version of AUP family for prototyping and repair DIP-14 0.8-3.6V CMOS

The 7404 is a Hex Inverter. Family variants span from the original LS TTL (5V only) to modern LVC/AUP (down to 0.8V). HC and HCT versions offer 2-6V CMOS operation with HCT providing TTL-compatible input thresholds for mixed 5V systems. CD4000-series equivalents offer the widest 3-18V supply range at the cost of lower switching speed. DIP packages (N suffix) are through-hole; SOIC (D suffix) and TSSOP are surface-mount.

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