MP1484EN-LF-Z

The MP1484 from MPS is a monolithic synchronous buck regulator integrating 85 mΩ top and bottom MOSFETs in a thermally enhanced SOIC-8 EP package. The MP1484EN-LF-Z is the lead-free tape-and-reel version. It delivers 3 A continuous output current from a 4.75 V to 18 V input with output adjustable from 0.925 V to 20 V.

The device uses peak current-mode control with internal slope compensation, providing fast line and load transient response, easy loop compensation, and inherent cycle-by-cycle current limiting. The 0.925 V feedback reference voltage with ±2.7% accuracy over temperature allows precision output regulation.

The integrated synchronous rectifier eliminates the external Schottky catch diode, improving efficiency especially at low output voltages. Up to 95% efficiency is achievable at 12 V input, 3.3 V output, 2 A load.

The programmable soft-start (CSS pin) prevents inrush current by slowly ramping the output voltage. The EN pin provides logic-level shutdown with supply current dropping below 1 µA.

The MP1484 is pin-compatible with the MP1482 (2 A version), offering a simple upgrade path for higher current designs.

Important: MPS designates the MP1484 as “Not Recommended for New Designs” (NRND). The recommended replacement is the MP2307DN-LF, which offers similar performance in a smaller package. Designers should verify availability before using the MP1484 in new designs.

**Synchronous Buck Topology:** The MP1484 uses a synchronous buck converter architecture with an integrated high-side NMOS switch and low-side NMOS synchronous rectifier. During the on-time, the high-side switch connects VIN to the inductor, storing energy in the inductor’s magnetic field. During the off-time, the high-side switch opens and the low-side switch turns on, providing a path for inductor current to continue flowing to the output.

**Current-Mode Control:** The inner current loop compares the peak inductor current (sensed through the high-side switch) against the error amplifier output. This provides cycle-by-cycle current limiting and simplifies loop compensation. Internal slope compensation prevents sub-harmonic oscillation at duty cycles above 50%.

**Bootstrap Supply:** The BS pin provides gate drive voltage for the high-side NMOS switch. An external bootstrap capacitor (0.1 µF) between BS and SW is charged during the off-time when SW is near ground, then provides the voltage above SW needed to drive the high-side gate during on-time.

**Soft-Start:** The SS pin sources a current to charge an external capacitor, creating a voltage ramp that limits the error amplifier output during startup, preventing inrush current and output overshoot.