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The MMBFJ113 from onsemi is an N-channel JFET switch with -0.5V to -3.0V cutoff voltage, 2mA IDSS, and SOT-23-3 package for low-level analog switching.
Especificaciones
| Tipo | N-Channel JFET Switch |
| VGS(off) (Cutoff Voltage) | -0.5V to -3.0V |
| IDSS (Zero-Gate Drain Current) | 2.0 mA (min) @ VDS=15V |
| rDS(on) | 100 Ohm (max) @ VDS=0.1V, VGS=0 |
| V(BR)GSS | -35 V (min) @ IG=-1uA |
| IGSS (Gate Leakage) | -1.0 nA (max) @ VGS=-15V |
| Power Dissipation | 350 mW @ TA=25C |
| RJA | 357 C/W |
| Paquete | SOT-23-3 (TO-236-3) |
| Temperatura de funcionamiento | -55C to +150C (TJ) |
Características
- N-channel JFET for low-level analog switching
- 2mA IDSS minimum with -0.5V to -3.0V cutoff
- 100 Ohm max on-resistance
- Source and drain are interchangeable
Ultra-low gate leakage: -1.0 nA max - Designed for sample-and-hold and chopper circuits
Aplicaciones
- Sample-and-hold circuits
- Chopper-stabilized amplifiers
- Analog signal switching
- Low-level signal gating
The MMBFJ113 from onsemi is an N-channel junction field-effect transistor (JFET) designed for low-level analog switching applications in a SOT-23-3 surface-mount package. As a depletion-mode device, the JFET is normally-on (conducting) when VGS=0, with a minimum IDSS of 2.0mA at VDS=15V. The gate-source cutoff voltage (VGS(off)) ranges from -0.5V to -3.0V, meaning the channel is pinched off when VGS is negative enough to exceed the cutoff voltage. The 100 Ohm maximum on-resistance at VGS=0 provides low insertion loss for analog signals. The ultra-low gate leakage current (-1.0 nA maximum) ensures minimal offset current in sample-and-hold and chopper applications. Source and drain are interchangeable, simplifying PCB layout. The J113 is the lowest IDSS member of the J111/J112/J113 family (20mA/5mA/2mA respectively), optimized for the lowest on-resistance per unit of drain current.
The MMBFJ113 is an N-channel JFET where the gate forms a reverse-biased PN junction with the channel. At VGS=0, the channel is fully open and IDSS (drain current at zero gate voltage) flows, determined by the channel geometry and doping. As VGS becomes more negative, the depletion region around the gate extends further into the channel, narrowing the conductive path. When VGS reaches VGS(off) (-0.5V to -3.0V), the depletion region pinches off the channel entirely and drain current drops to essentially zero. In analog switch applications, the JFET is used in its low-resistance region (VGS=0 for ON, VGS less than VGS(off) for OFF). The gate leakage current is the reverse-biased PN junction leakage, typically sub-nanoampere, which is critical for sample-and-hold circuits where any gate current would cause charge to leak from the hold capacitor. The 100 Ohm on-resistance is determined by the channel length, width, and doping concentration. The interchangeability of source and drain is a feature of symmetric JFET geometry, unlike MOSFETs where the body diode creates asymmetry.
Pin Nombre Tipo Función 1 Puerta Entrada Gate terminal (reverse-biased PN junction) 2 Fuente Potencia Source terminal (interchangeable with Drain) 3 Drenaje Potencia Drain terminal (interchangeable with Source) - Sample-and-hold circuit with MMBFJ113 as the sampling switch and 1nA max gate leakage for minimal droop on hold capacitor
- Chopper-stabilized amplifier input switch with 100 Ohm on-resistance and zero offset voltage
- Precision analog signal gating with depletion-mode normally-on operation for fail-safe designs
Fabricante Número de pieza Paquete Notas onsemi MMBFJ111 SOT-23-3 20mA IDSS, lower rDS(on) (30 Ohm) onsemi MMBFJ112 SOT-23-3 5mA IDSS, 50 Ohm rDS(on) onsemi J113 TO-92 Through-hole version NXP BF862 SOT-23-3 VHF/UHF amplifier JFET, higher IDSS InterFET 2N5457 TO-92 General purpose N-ch JFET Recomendar piezas
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