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CD4026BE

Decade counter + 7-segment decoder, drives LED display, PDIP-16

4000

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Pieza del fabricante：

CD4026BE

Paquete：

PDIP-16 (19.3 x 6.35 x 4.57mm, 2.54mm pitch, through-hole)

Marca：

Categorías de productos：

Circuitos integrados IC, Circuitos integrados de interfaz

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Descripción

Productos

The CD4026BE from Texas Instruments is a CMOS decade counter/divider with 7-segment decoded outputs, designed to directly drive common-cathode LED displays without external decoding logic in a 16-pin PDIP package.

Especificaciones

Tipo	Decade counter with 7-segment decoder
Tensión de alimentación	3V to 18V
Clock Frequency	8MHz typical @ VDD=10V
Outputs	7 decoded segment outputs (a-g) + Carry Out
Display Enable	Active HIGH; LOW blanks display
Display Enable Out	Goes LOW on count 2 (for ripple blanking)
Temperatura de funcionamiento	-55°C to +125°C
Paquete	PDIP-16 (19.3 x 6.35mm)

Características

Decade counter + 7-segment decoder in one IC
Directly drives common-cathode LED displays
Display enable for blanking
Ripple blanking for leading-zero suppression
Carry out for cascading multiple digits
CMOS 4000B series: 3V-18V operation

Aplicaciones

Digital counter with LED display
Frequency counter display
Event counter
Scoreboard display

Introducción del producto:CD4026BE Presentación del producto

The CD4026BE from Texas Instruments combines a decade counter and a 7-segment decoder/driver in a single 16-pin CMOS IC. On each rising clock edge, the counter advances and the 7-segment outputs (a through g) update to display the current count (0-9) on a common-cathode LED display. This eliminates the need for a separate BCD-to-7-segment decoder like the CD4511. The Display Enable In (DEI) pin controls whether the segment outputs are active; when LOW, all segments are blanked (off), allowing display multiplexing or intentional blanking. The Display Enable Out (DEO) goes LOW when the count reaches 2, which is used for ripple blanking: connecting DEO of a higher-order digit to DEI of the next lower digit causes leading zeros to be blanked (a count of 005 displays as ‘ 5’). The Carry Out (CO) produces one pulse per 10 clock cycles for cascading to the next digit. The BE suffix denotes the PDIP-16 package with full temperature range.

Principio de funcionamiento:CD4026BE Principio de funcionamiento

The CD4026BE contains a 5-stage Johnson counter (similar to the CD4017) followed by a combinational decoder that converts the counter state to 7-segment format. The Johnson counter has 10 valid states, each corresponding to digits 0-9. The decoder maps each state to the appropriate combination of segment outputs a-g. For example, digit 0 activates segments a, b, c, d, e, f (but not g); digit 1 activates b, c only; digit 8 activates all segments. The Display Enable In (DEI) gate controls the segment outputs: when DEI is HIGH, the segments drive normally; when DEI is LOW, all segment outputs go to the inactive state (LOW for common-cathode drive). The Clock input has Schmitt-trigger action for unlimited rise/fall times. The Ripple Blanking feature works as follows: DEO goes LOW when the count is between 0 and 1 (not during 2-9). When DEO of a tens digit connects to DEI of a units digit, both digits display zeros only when the tens digit is 2 or higher; for counts 00 and 01, both are blanked. For a 3-digit display, cascade the hundreds DEO to tens DEI, and tens DEO to units DEI.

Descripción de la clavija:CD4026BE Definición y funciones de las clavijas

Pin	Nombre	Tipo	Descripción
1	CLK	Entrada	Clock input (rising edge, Schmitt trigger)
2	DEI	Entrada	Display enable in (HIGH=display on, LOW=blanked)
3	DEO	Salida	Display enable out (LOW during counts 0-1, for ripple blanking)
4	e	Salida	Segment e output
5	d	Salida	Segment d output
6	CO	Salida	Carry out (1 pulse per 10 clocks, for cascading)
7	c	Salida	Segment c output
8	VSS	Potencia	Tierra (0V)
9	b	Salida	Segment b output
10	g	Salida	Segment g output
11	f	Salida	Segment f output
12	a	Salida	Segment a output
13	RST	Entrada	Reset (active HIGH, clears to 0)
14	CLK INH	Entrada	Clock inhibit (HIGH=stop counting)
15	OUT 7	Salida	Divided-by-5 output (for CD4022 compatibility)
16	VDD	Potencia	Positive supply (3V to 18V)

Application Scenarios:In which products and applications isCD4026BE usado

2-Digit Counter: NE555 oscillator → CD4026BE #1 CLK; CO → CD4026BE #2 CLK; each drives one 7-segment display; counts 00-99
Frequency Counter: Input signal through gate → CD4026BE; 1-second gate time; display shows frequency in Hz
Ripple Blank 3-Digit: Hundreds DEO → Tens DEI; Tens DEO → Units DEI; display ‘ 5’ instead of ‘005’
Event Counter: Sensor pulse → CD4026BE CLK; display shows event count; RST button to clear

Alternative Models:What chips are recommended as replacements for CD4026BE

Modelo	Fabricante	Diferencia clave	Paquete	Supply
CD4026BM	TI	SOIC-16 surface-mount version with identical logic function and 3-18V range	SOIC-16	3-18V
CD4026BE	TI	Through-hole DIP version for prototyping and legacy board repair	DIP-16	3-18V
HEF4026BT	NXP	Pin-compatible CMOS version with improved ESD protection and 3-15V supply	SOIC-16	3-15V
MC144026BDR2G	onsemi	Pin-compatible equivalent with RoHS compliance and AEC-Q100 automotive option	SOIC-16	3-18V
74HC4026D	TI/Nexperia	HC CMOS version with higher speed and 2-6V supply for modern logic systems	SOIC-16	2-6V
74HC4026N	TI/Nexperia	HC CMOS through-hole version for prototyping with 2-6V supply range	DIP-16	2-6V
74HCT4026D	Nexperia	HCT version with TTL-compatible inputs for mixed 5V TTL/CMOS systems	SOIC-16	4.5-5.5V

CD4026 is the CMOS 4000-series decade counter/divider with 7-segment output operating over the wide 3-18V supply range. The HEF4026 (NXP) and MC144026 (onsemi) are direct pin-compatible equivalents. For higher speed at the cost of narrower voltage range, the 74HC4026 HC/HCT families offer significantly faster propagation delay and lower power consumption at 2-6V. Surface-mount versions use the BM/M suffix (SOIC); through-hole versions use the BE suffix (DIP).