DRV8833CRTER

The DRV8833CRTER from Texas Instruments is a dual H-bridge motor driver with integrated PWM current regulation, housed in a compact 16-pin WQFN package with PowerPAD for thermal management. It is designed for battery-powered toys, printers, security cameras, and other mechatronic applications requiring precise motor control.

IMPORTANT: This device is OBSOLETE and no longer in production. Texas Instruments recommends the DRV8410RTER (2.5A, same pinout) or DRV8411RTER (4A, same pinout) as direct replacements. The DRV8410/8411 are drop-in compatible with enhanced current capability and extended temperature range (-40C to +125C).

The DRV8833C is the current-regulated variant of the DRV8833 family. The key difference from the standard DRV8833 is the addition of PWM current regulation circuitry that uses external sense resistors on the AISEN and BISEN pins to set the current regulation threshold. This allows precise control of motor winding current, which is essential for stepper motor applications where accurate current setting determines torque and microstepping accuracy.

Each H-bridge consists of N-channel and P-channel MOSFETs in a standard H-bridge configuration. The combined high-side and low-side on-resistance (HS+LS) is 1735mOhm typical at 5V/25C, which is significantly higher than the DRV8833 (360mOhm). This higher resistance reduces the current capacity of the DRV8833C in the WQFN package to 0.6A RMS per bridge, compared to 1.5A RMS for the DRV8833 in the HTSSOP package.

The PWM current regulation works by monitoring the voltage across the external sense resistor (connected between AISEN/BISEN and GND). When the voltage exceeds the internal 200mV reference, the driver enters a fast-decay mode for a fixed off-time, reducing the average current through the motor winding. The current regulation threshold is set by the sense resistor value: I_trip = 0.2V / R_sense. For example, a 0.33Ohm resistor sets the trip current to approximately 606mA.

The device is controlled through four logic inputs (AIN1, AIN2, BIN1, BIN2) that directly set the state of the corresponding outputs. This simple PWM interface requires no serial communication or register programming. Each pair of inputs controls one H-bridge: when xIN1=HIGH and xIN2=LOW, current flows forward through the motor; when xIN1=LOW and xIN2=HIGH, current flows in reverse; when both inputs are LOW or both HIGH, the motor brakes. PWM signals on the input pins control motor speed.

The nSLEEP pin provides a low-power sleep mode that reduces the supply current to 1.6uA typical. When nSLEEP is driven low, all internal circuitry including the charge pump is disabled, and the outputs are placed in a high-impedance state. When nSLEEP returns high, the device wakes up in approximately 155us.

Protection features include overcurrent protection (OCP) that limits current through the MOSFETs to a safe level, undervoltage lockout (UVLO) that disables the outputs when VM drops below the threshold, thermal shutdown (TSD) that disables the outputs when the junction temperature exceeds approximately 150C, and short-circuit protection. All fault conditions are reported through the nFAULT open-drain output.

The DRV8833CRTER operates as a dual H-bridge motor driver with integrated PWM current regulation.

H-Bridge Architecture: Each of the two H-bridges consists of four power MOSFETs arranged in an H-configuration. The high-side MOSFETs are P-channel devices (for simpler gate drive), and the low-side MOSFETs are N-channel devices. The H-bridge allows bidirectional current flow through the motor winding: when the upper-left and lower-right MOSFETs are on, current flows in one direction; when the upper-right and lower-left MOSFETs are on, current flows in the opposite direction.

Charge Pump and Gate Drive: An internal charge pump generates the gate drive voltage for the high-side N-channel MOSFETs (note: the DRV8833 uses N-channel MOSFETs for both high and low side, unlike the DRV8833C which uses a mix of N and P channels). A 0.01uF capacitor connected between VCP and VM stores the charge pump output. The charge pump operates at a fixed frequency and provides sufficient gate drive even at low supply voltages (2.7V).

PWM Current Regulation: The DRV8833C adds current regulation capability not present in the standard DRV8833. External sense resistors (R_sense) are connected between the AISEN/BISEN pins and GND. The voltage across the sense resistor is proportional to the motor current: V_sense = I_motor x R_sense. An internal comparator compares V_sense to a 200mV reference voltage. When V_sense exceeds 200mV (indicating the motor current has exceeded the set threshold), the driver enters a fast-decay mode for a fixed off-time period, turning off the appropriate MOSFETs and allowing the current to recirculate through the freewheeling diodes. After the off-time expires, the MOSFETs are re-enabled, and the cycle repeats. This chopper-style regulation maintains the average motor current at the set level regardless of supply voltage variations or back-EMF changes.

Logic Control: The AIN1/AIN2 and BIN1/BIN2 inputs directly control the H-bridge output states through a simple logic decoder. When xIN1=1 and xIN2=0: xOUT1=HIGH, xOUT2=LOW (forward). When xIN1=0 and xIN2=1: xOUT1=LOW, xOUT2=HIGH (reverse). When xIN1=0 and xIN2=0: both outputs high-impedance (coast/fast decay). When xIN1=1 and xIN2=1: both outputs LOW (brake/slow decay). PWM speed control is achieved by rapidly switching between the forward (or reverse) state and the coast or brake state.

Internal Regulator: The VINT pin provides access to the internal 3.3V regulator output, which powers the logic and control circuitry. A 2.2uF bypass capacitor is required on the VINT pin to ensure stable regulator operation. The internal regulator allows the device to operate from a single supply (VM) without a separate logic supply.

Fault Protection: The overcurrent protection (OCP) circuit monitors the current through each MOSFET independently. If the current exceeds the safe operating limit (approximately 2-3A depending on conditions), the driver immediately disables the affected H-bridge and asserts nFAULT. The thermal shutdown circuit monitors the junction temperature and disables both H-bridges when it exceeds approximately 150C. The undervoltage lockout (UVLO) disables the outputs when VM drops below approximately 2.5V. All fault conditions are reported through the nFAULT open-drain output, which requires an external pull-up resistor.