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AT24CM01-SHD-B

1Mbit I2C EEPROM, 1MHz, 256B page, 1.7-5.5V, SOIJ-8

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Manufacturer Part：

AT24CM01-SHD-B

Package：

8-Pin SOIJ (5.3 x 5.3 x 1.75 mm)

Description

Product Overview

The AT24CM01-SHD-B is a Microchip 1Mbit (128Kx8) I2C serial EEPROM with 1MHz clock, 1.7-5.5V operation, 1M cycle endurance, 256-byte page write, and hardware write-protect. SHD suffix indicates SOIJ-8 package, industrial temperature.

Key Specifications

Capacity	1 Mbit (128K x 8)
Interface	I2C, 400kHz/1MHz
Page Size	256 bytes
Supply	1.7 V to 5.5 V
Endurance	1,000,000 cycles
Write Time	5 ms max

Features

1Mbit I2C EEPROM
1MHz clock at 2.5V+
256-byte page write
1.7V to 5.5V operation
1 million cycle endurance
6uA standby current
Hardware write-protect pin

Applications

Industrial parameter storage
Consumer electronics configuration
Medical device calibration data
IoT sensor calibration

Product Introduction:AT24CM01-SHD-B Product Introduction

The AT24CM01-SHD-B is a Microchip 1Mbit I2C serial EEPROM organized as 128K x 8 bits in an 8-pin SOIJ package. The device supports both 400kHz (standard mode) and 1MHz (fast mode plus) I2C clock frequencies, enabling high-speed data transfer in data-intensive applications. The 1.7V to 5.5V supply range supports operation from low-voltage battery systems to 5V rails. The 256-byte page write capability significantly improves write throughput compared to byte-write-only devices. The hardware write-protect (WP) pin protects the entire memory array when asserted, preventing accidental data corruption during system power transitions. The 1 million cycle endurance and 40-year data retention ensure long-term reliability for industrial and automotive applications. The Schmitt-trigger and filtered inputs provide noise suppression on the I2C bus. The self-timed write cycle automatically erases and programs the page within 5ms. Two address pins (A0, A1) allow up to four devices on the same I2C bus for a total of 4Mbit. Packaged in SOIJ-8 rated for -40C to +85C.

Working Principle:AT24CM01-SHD-B Working Principle

The AT24CM01 uses a standard I2C protocol with 7-bit device address (1010A1A0P0 for 1Mbit, where P0 is the MSB of the 17-bit word address). Write operations begin with a START condition, device address byte (R/W=0), two address bytes (16 bits, with P0 in the device address), then up to 256 data bytes. The internal address counter increments with each data byte, wrapping within the 256-byte page boundary at page edges. A STOP condition initiates the self-timed internal write cycle (5ms max). Read operations use current-address, random, or sequential read modes. Sequential reads can cross page boundaries, reading the entire memory continuously. The WP pin, when connected to VCC, disables all write operations, providing hardware data protection. The I2C interface uses open-drain SDA output with clock stretching capability during internal write cycles.

Pin Description:AT24CM01-SHD-B Pin Definition and Functions

Pin	Mnemonic	Description
1	A0	Address input 0
2	A1	Address input 1
3	NC	No connect
4	GND	Ground
5	SDA	Serial data (I2C)
6	SCL	Serial clock (I2C)
7	WP	Write protect (active high)
8	VCC	Supply voltage