الصفحة الرئيسية > الدوائر المتكاملة الدوائر المتكاملة > CD4015BE

CD4015BE

Dual 4-bit SIPO shift register, common CLK, independent reset, CMOS 3-18V, PDIP-16

3000

المخزون الفعال

انتقل إلى الاستفسار

Image for reference only

جزء الشركة المصنعة ： جزء الشركة المصنعة

CD4015BE

الحزمة ： الحزمة

PDIP-16 (19.3 x 9.4 x 4.57mm, 2.54mm pitch, through-hole)

العلامة التجارية ： العلامة التجارية

فئات المنتجات:：فئات المنتجات

الدوائر المتكاملة الدوائر المتكاملة, واجهة ICs

توصيات أخرى قد تكون مهتماً بها.

SII9396SCNUC-BAR

IS43TR16256BL-125KBLI

الوصف

نظرة عامة على المنتج

The CD4015BE from Texas Instruments contains two independent 4-bit serial-in parallel-out shift registers with common clock and independent reset — a dual CD4014-like device in a 16-pin PDIP package.

المواصفات الرئيسية

الوظيفة	Dual 4-bit serial-in parallel-out shift register
Technology	CD4000B CMOS
جهد الإمداد	3V to 18V
Register Length	4 bits each (2 independent registers)
Serial Input	DATA (per register)
Outputs	Q1, Q2, Q3, Q4 (per register, all accessible)
إعادة تعيين	Asynchronous, active HIGH (MR, per register)
الحد الأقصى لتردد الساعة	6MHz @ VDD=10V
درجة حرارة التشغيل	-55 درجة مئوية إلى +125 درجة مئوية
الحزمة	PDIP-16 (19.3 x 9.4mm)

الميزات

Two independent 4-bit shift registers
Common clock (CLK) for both registers
Independent data inputs and resets
All 4 outputs accessible per register
Cascadable: Q4 → DATA of next register
3V-18V wide supply range

التطبيقات

Serial-to-parallel conversion
LED chaser / display driving
Temporary data storage
Time delay circuits

مقدمة المنتج:CD4015BE مقدمة المنتج

The CD4015BE from Texas Instruments contains two independent 4-bit serial-in parallel-out shift registers sharing a common clock. Each register has its own DATA input, MR (master reset), and four parallel outputs (Q1-Q4). On each rising clock edge, the DATA input is shifted into Q1, and Q1→Q2→Q3→Q4 in a ripple fashion. When MR is HIGH, all outputs are forced to 0 asynchronously. The common clock means both registers shift simultaneously — useful for dual-channel applications where two data streams must be synchronized. The two registers can also be cascaded: Q4 of register 1 connects to DATA of register 2, creating an 8-bit shift register. Unlike the CD4094, the CD4015 has no output latch — outputs change as data shifts through, which is fine for LED chasers but may cause flicker in display applications requiring stable outputs. The CD4015 is simpler and lower-cost than the CD4094 for applications that don’t need latched outputs. The BE suffix denotes the PDIP-16 package.

مبدأ العمل:CD4015BE مبدأ العمل

Each 4-bit shift register in the CD4015BE operates as follows: on each rising CLK edge, DATA is loaded into Q1, and all other bits shift one position (Q1→Q2, Q2→Q3, Q3→Q4). The old Q4 data is lost (or passed to a cascaded register). When MR (master reset) is HIGH, all four outputs (Q1-Q4) are forced to 0 immediately regardless of CLK and DATA. For normal shifting, MR must be LOW. To load 4 bits: shift 4 clock cycles with the desired data on DATA; after 4 clocks, Q1=last bit shifted, Q4=first bit shifted. For cascading: Q4 of register 1 → DATA of register 2; shared CLK; after 8 clocks, register 2 has the first 4 bits and register 1 has the last 4 bits — an 8-bit SIPO. Both registers shift on the same clock edge, so dual data streams can be processed in parallel. The CD4015 is essentially half a CD4014 (8-bit) with separate resets and no parallel load capability.

وصف الدبوس:CD4015BE تعريف الدبوس ووظائفه

دبوس	الاسم	النوع	الوصف
1	Q4A	المخرجات	Register A output bit 4 (MSB)
2	Q3A	المخرجات	Register A output bit 3
3	Q2A	المخرجات	Register A output bit 2
4	Q1A	المخرجات	Register A output bit 1 (LSB, first stage)
5	CLK	المدخلات	Common clock (positive edge)
6	MRA	المدخلات	Register A master reset (active HIGH)
7	DATA A	المدخلات	Register A serial data input
8	VSS	الطاقة	أرضي
9	DATA B	المدخلات	Register B serial data input
10	MRB	المدخلات	Register B master reset (active HIGH)
11	Q1B	المخرجات	Register B output bit 1 (LSB)
12	Q2B	المخرجات	Register B output bit 2
13	Q3B	المخرجات	Register B output bit 3
14	Q4B	المخرجات	Register B output bit 4 (MSB)
15	VDD	الطاقة	Supply (3V to 18V)
16	نورث كارولاينا	—	No connection

Application Scenarios:In which products and applications isCD4015BE مستعمل

8-Bit SIPO: Q4A → DATA B; shared CLK; shift 8 bits → 8 parallel outputs from 2 MCU pins
Dual 4-LED Chaser: Two independent LED patterns on Q1A-Q4A and Q1B-Q4B; same CLK; different data streams
4-Bit Time Delay: Signal on DATA A; Q1A = 1 clock delay, Q2A = 2, Q3A = 3, Q4A = 4 clock delays
Serial-to-Parallel: MCU serial data → DATA A; CLK from MCU; Q1A-Q4A = 4-bit parallel output after 4 clock cycles

Alternative Models:What chips are recommended as replacements for CD4015BE

الطراز	الشركة المصنعة	الفرق الرئيسي	الحزمة	Supply
CD4015BM	TI	SOIC-16 surface-mount version with identical logic function and 3-18V range	SOIC-16	3-18V
CD4015BE	TI	Through-hole DIP version for prototyping and legacy board repair	DIP-16	3-18V
HEF4015BT	NXP	Pin-compatible CMOS version with improved ESD protection and 3-15V supply	SOIC-16	3-15V
MC144015BDR2G	أونسمي	Pin-compatible equivalent with RoHS compliance and AEC-Q100 automotive option	SOIC-16	3-18V
74HC164D	TI/Nexperia	HC CMOS version with higher speed and 2-6V supply for modern logic systems	SOIC-16	2-6V
74HC164N	TI/Nexperia	HC CMOS through-hole version for prototyping with 2-6V supply range	DIP-16	2-6V
74HCT164D	نيكسبيريا	HCT version with TTL-compatible inputs for mixed 5V TTL/CMOS systems	SOIC-16	4.5-5.5V

CD4015 is the CMOS 4000-series dual 4-bit serial-in/parallel-out shift register operating over the wide 3-18V supply range. The HEF4015 (NXP) and MC144015 (onsemi) are direct pin-compatible equivalents. For higher speed at the cost of narrower voltage range, the 74HC164 HC/HCT families offer significantly faster propagation delay and lower power consumption at 2-6V. Surface-mount versions use the BM/M suffix (SOIC); through-hole versions use the BE suffix (DIP).