ADG1434YRUZ-REEL7

The ADG1434YRUZ-REEL7 from Analog Devices is a quad SPDT (4-channel, 2:1 multiplexer) analog switch built on the iCMOS (industrial CMOS) process, offering very low on-resistance (4 Ohm typical) with excellent on-resistance flatness (0.5 Ohm) and channel matching (0.55 Ohm), making it ideal for precision signal routing applications where distortion and signal integrity are critical.

The iCMOS process is Analog Devices’ proprietary technology that combines high-voltage CMOS with bipolar transistors, enabling analog switches that can operate at high supply voltages (up to plus or minus 16.5 V or 33 V single supply) while achieving low on-resistance and low power consumption. Traditional high-voltage CMOS switches have on-resistance values of 50-200 Ohms; the iCMOS process achieves 4 Ohm, a 10-50x improvement.

The ADG1434 contains four independently controlled SPDT switches. Each SPDT switch has one common terminal (D) and two selectable terminals (S1, S2). The control input (INx) selects which terminal is connected to the common: when INx is LOW, S1A is connected to DA; when INx is HIGH, S1B is connected to DA. Each switch operates independently, and the four switches can be used to route four different signals simultaneously.

The 4 Ohm typical on-resistance is one of the lowest available for a plus or minus 15 V analog switch. This low on-resistance minimizes signal attenuation and voltage error when the switch is in the signal path. For example, with a 10 kOhm load, a 4 Ohm switch introduces only 0.04 percent voltage error (4 / 10004), which is negligible for most applications.

The on-resistance flatness of 0.5 Ohm is equally important. On-resistance varies with the analog signal voltage (because the MOSFET gate-source voltage changes as the analog signal swings), and this variation causes distortion. A 0.5 Ohm flatness means the on-resistance varies by only plus or minus 0.25 Ohm over the full analog signal range, resulting in very low distortion (0.06 percent THD+N). This is critical for audio and precision measurement applications.

The break-before-make (BBM) switching action ensures that the currently connected channel is disconnected before the new channel is connected, preventing momentary short circuits between the two signal sources. The BBM time delay is guaranteed to be at least 90 ns, which is sufficient to prevent short-circuit current spikes but short enough to minimize the signal glitch duration.

The very low leakage currents (0.02 nA typical off-leakage at 25 degrees C) ensure that signals on disconnected channels do not bleed through to the output. At 85 degrees C, the maximum off-leakage is only 3 nA, which for a 100 kOhm source impedance produces only 300 uV of crosstalk voltage – well below the noise floor of most measurement systems.

The plus or minus 15 V supply capability makes the ADG1434 suitable for professional audio equipment (which typically uses plus or minus 15 V analog supplies), industrial instrumentation, and data acquisition systems that need to switch signals with up to plus or minus 10 V amplitude. The device can also operate from a single plus 12 V supply (with GND = 0 V and VSS = 0 V) or from plus or minus 5 V supplies for lower-voltage systems.

The 200 MHz -3 dB bandwidth at plus or minus 15 V allows the switch to pass high-frequency signals without significant attenuation. Combined with the low on-resistance, this makes the ADG1434 suitable for video routing and high-speed data acquisition.

The ADG1434 is the quad SPDT version; the ADG1433 is the triple SPDT version with EN input, available in both TSSOP-16 and LFCSP-16. The ADG1434 in TSSOP-20 does not have an EN pin (all channels are always active); the LFCSP-20 version includes an EN pin. For applications requiring the EN function, use ADG1434YCPZ-REEL7 instead.

The -70 dB off-isolation at 1 MHz and -70 dB channel-to-channel crosstalk ensure excellent signal integrity when multiple channels are used simultaneously. These specifications degrade at higher frequencies but remain acceptable for most audio and instrumentation applications up to several MHz.

The ADG1434YRUZ-REEL7 operates as a set of four independently controlled SPDT analog switches using enhancement-mode N-channel and P-channel MOSFETs in a T-switch configuration, fabricated on the iCMOS process.

Switch Element: Each SPDT switch position uses a complementary NMOS/PMOS pair connected in parallel. The NMOS transistor conducts the negative half of the analog signal, while the PMOS transistor conducts the positive half. Together, they provide rail-to-rail signal handling from VSS to VDD. The on-resistance of the NMOS and PMOS transistors varies in opposite directions with the analog signal voltage: as the signal rises toward VDD, the NMOS RDS(on) increases while the PMOS RDS(on) decreases. The parallel combination produces a relatively flat on-resistance characteristic over the signal range, resulting in the 0.5 Ohm flatness specification.

iCMOS Process: The iCMOS (industrial CMOS) process differs from standard CMOS by incorporating high-voltage DMOS (Double-diffused MOS) transistors that can withstand up to 33 V between drain and source. This enables the ADG1434 to operate at plus or minus 15 V supplies while maintaining low on-resistance. In a standard CMOS process, the MOSFET on-resistance increases dramatically with voltage rating due to the longer channel and heavier drift region required. The iCMOS process uses a lateral DMOS structure that separates the high-voltage blocking region from the channel region, achieving both high voltage capability and low on-resistance simultaneously.

Switch Control: Each SPDT switch has a control input (INx). The control logic is non-inverting: when INx is LOW (below 0.8 V), the A-side switch is closed (S1A connected to D1) and the B-side switch is open; when INx is HIGH (above 2.0 V), the B-side switch is closed (S1B connected to D1) and the A-side switch is open. The digital inputs are 3 V logic compatible, meaning they can be driven by 3.3 V logic even when the analog supplies are plus or minus 15 V. The level shifting is done internally.

Break-Before-Make: The BBM circuit ensures a minimum dead time (90 ns) between opening one switch and closing the other. During this dead time, the common terminal (D) is floating (high impedance). The BBM action prevents the two signal sources (S1A and S1B) from being momentarily connected together, which would cause current to flow from the higher voltage source to the lower voltage source, potentially damaging the source or causing signal glitches. The BBM time is controlled by an internal delay circuit.

Charge Injection: When a MOSFET switch transitions from on to off, the gate charge that was inducing the channel must go somewhere, and a small amount (charge injection) is coupled to the analog signal path through the gate-to-channel capacitance. The ADG1434 has a charge injection of -10 pC at plus or minus 5 V. The negative sign indicates that the output voltage steps negative when the switch turns off. At plus or minus 15 V, the charge injection is typically -50 pC. The charge injection is relatively constant over the analog signal range, which means it can be partially compensated by adding an equal and opposite charge injection from a dummy switch driven by the complementary control signal.

Leakage Currents: When a switch is off, the NMOS and PMOS transistors are both in cutoff, and only the subthreshold leakage and junction leakage currents flow. The 0.02 nA typical off-leakage at 25 degrees C is achieved by careful layout and process design to minimize junction areas and surface leakage paths. At 125 degrees C, the leakage increases due to the temperature dependence of the subthreshold current and junction reverse saturation current, but remains below 8 nA.

Bandwidth and Isolation: The -3 dB bandwidth of 145 MHz at plus or minus 5 V is determined by the RC time constant of the on-resistance (4 Ohm) and the off-state capacitance of the switch and PCB trace. The off-isolation (-70 dB at 1 MHz) is determined by the parasitic capacitance between the open switch terminal and the common terminal, which creates a capacitive voltage divider with the load impedance. At higher frequencies, the isolation degrades because the capacitive reactance decreases. The channel-to-channel crosstalk (-70 dB at 1 MHz) is determined by the parasitic capacitance between adjacent switch channels on the die and in the package.

Power Dissipation: The ADG1434 draws very low supply current (IDD = 18 uA, ISS = 0.5 uA typical) for the internal logic and control circuits. The power dissipation is dominated by the load current through the on-resistance: P = I^2 x RON. At 115 mA per channel, the power dissipation per channel is 115^2 x 4 = 53 mW. With all four channels carrying 115 mA, total switch dissipation is 212 mW, plus the quiescent dissipation.