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TPS7A4001DGNR

Negative LDO, -20V, 1A, 16uVrms, 40dB PSRR, MSOP-8

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Manufacturer Part：

TPS7A4001DGNR

Package：

8-Pin MSOP PowerPAD (3.0 x 3.0 x 1.0 mm)

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Description

Product Overview

The TPS7A4001DGNR is a Texas Instruments -20V negative LDO with 1A output, 40dB PSRR at 1kHz, and 16uVrms noise. Ultra-low noise negative regulator for sensitive analog loads. Packaged in MSOP-8 PowerPAD, -40C to +125C.

Key Specifications

Output -0.5V to -20V adjustable
Current 1 A
PSRR 40 dB @ 1kHz
Noise 16 uVrms (10Hz-100kHz)
Dropout 200 mV @ 1A
Package MSOP-8 PowerPAD

Features

  • Negative voltage LDO, -0.5V to -20V
  • 1A output current
  • 16uVrms ultra-low noise
  • 40dB PSRR at 1kHz
  • 200mV dropout at 1A
  • NR pin for noise reduction
  • MSOP-8 PowerPAD package

Applications

  • Negative analog rail cleanup
  • Op amp and ADC negative supply
  • RF and VCO negative bias
  • Test and measurement

The TPS7A4001DGNR is a Texas Instruments 1A negative-voltage low-dropout regulator in an 8-pin MSOP PowerPAD package. The device regulates negative input voltages from -0.5V to -20V, making it the negative-rail complement to the TPS7A45 positive LDO. The 16uVrms output noise over 10Hz to 100kHz and 40dB PSRR at 1kHz make it ideal for cleaning switching DC-DC negative rail noise for precision op amps, ADCs, and DACs that require a clean negative supply. The 200mV dropout at 1A provides good efficiency with moderate headroom. The NR (noise reduction) pin accepts an external 0.01uF capacitor that filters the internal reference noise, achieving the 16uVrms specification. The adjustable output voltage is set by two external resistors from VOUT to FB to GND, with a -1V reference. An EN (enable) pin allows shutdown with 1uA IQ. The MSOP-8 PowerPAD package provides low thermal resistance for 1A operation at higher input-output differentials. The device is stable with ceramic output capacitors (2.2uF minimum). Packaged in MSOP-8 PowerPAD rated for -40C to +125C.

The TPS7A40 uses a PMOS pass transistor for low dropout on the negative rail. The error amplifier compares the FB pin voltage (derived from the output through the external resistor divider) with the -1V internal reference, driving the PMOS gate to maintain regulation. The NMOS architecture (similar to positive TPS7A45) provides low output noise and high PSRR inherent to the source-follower output topology. An internal charge pump generates the gate drive voltage required to fully enhance the PMOS pass transistor. The NR pin capacitor creates a low-pass filter that attenuates reference noise, achieving the 16uVrms output noise specification. When the EN pin is pulled low, the pass transistor is disabled and the output floats. Current limit and thermal shutdown protect the device during fault conditions. The device uses the negative rail as the reference domain, so all pin voltages are measured relative to the negative input supply.

Pin Mnemonic Description
1 OUT Regulated negative output
2 NR Noise reduction (0.01uF cap)
3 EN Enable (active high)
4 GND Ground (reference)
5 FB Feedback (-1V reference)
6 NC No connect
7 IN Negative input supply
8 NC No connect
  • Cleanup of DC-DC negative rail for precision dual-supply op amp with 16uVrms noise
  • Negative ADC/DAC reference supply with 40dB PSRR for switching converter cleanup
  • RF and VCO negative bias supply with NR pin capacitor for ultra-low noise
  • Test and measurement negative rail with MSOP-8 PowerPAD thermal performance
Model Manufacturer Key Difference
TPS7A3301 TI -36V, lower current
TPS7A45 TI Positive LDO complement
LT3094 ADI Negative 500mA LDO
ADM7150-NEG ADI Negative LDO variant
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