TPS54627DDAR

The TPS54627DDAR from Texas Instruments is a fully integrated synchronous buck converter that combines the controller, high-side and low-side MOSFETs, and compensation circuitry in a single 8-pin SO PowerPAD package. With 6 A of output current and a 4.5-18 V input range, it addresses the most common point-of-load conversion requirements in digital TV, set-top box, networking, and industrial applications.

As an integrated converter (not a controller), the TPS54627 includes the power MOSFETs on-chip, eliminating the need for external MOSFET selection, gate drive design, and current-sense circuitry. This dramatically simplifies the design process and reduces the solution footprint compared to a controller-plus-external-FET approach. The integrated FETs have RDSON values of 36 mOhm (high-side) and 28 mOhm (low-side), optimized for lower duty-cycle applications where the low-side FET carries current for a larger portion of the switching period.

The D-CAP2 control mode, shared with other TPS family devices, provides fast transient response without external compensation components. The internal ripple injection circuit ensures stable operation with ceramic output capacitors, which are preferred for their low ESR, long lifetime, and small size. The 650 kHz fixed switching frequency provides a good balance between efficiency and inductor/capacitor size for most applications.

The adjustable soft-start feature allows the designer to control the output voltage ramp-up rate by selecting an external capacitor on the SS pin. This is important for applications with strict power sequencing requirements or where inrush current must be limited. The prebiased soft-start capability ensures that the converter does not sink current from a precharged output, preventing output voltage undershoot during startup.

The SO PowerPAD (DDA) package provides excellent thermal performance through an exposed thermal pad that solders directly to the PCB ground plane. This thermal path keeps the junction temperature within safe limits even at full 6-A load with natural convection cooling, provided the PCB has adequate copper area connected to the PowerPAD.

The DDAR suffix indicates tape and reel packaging (DDA = SO PowerPAD-8, R = tape and reel), suitable for automated SMT assembly.

TI recommends the TPS566238 as a newer alternative with higher efficiency in a smaller package for new designs, though the TPS54627 remains in active production and is widely stocked by distributors.

The TPS54627DDAR operates as a fully integrated synchronous buck converter using D-CAP2 mode control with integrated power MOSFETs.

D-CAP2 Mode Control: The control loop uses the D-CAP2 architecture where the output voltage (sensed at the VFB pin through a resistor divider) is compared to an internal 0.760-V reference. The adaptive on-time controller generates PWM pulses whose duration is proportional to VOUT/VIN, maintaining a relatively constant 650 kHz switching frequency. The internal ripple injection circuit adds a synthetic ripple to the VFB signal, ensuring stable operation even with very-low-ESR ceramic output capacitors. No external Type-II or Type-III compensation network is required.

Integrated Power MOSFETs: The high-side NMOS (36 mOhm RDSON) and low-side NMOS (28 mOhm RDSON) are integrated on the same die as the controller. The SW pin is the switch node connecting the two MOSFETs. The bootstrap supply for the high-side driver is provided through an internal diode from VREG5 to VBST, with a 0.1-uF external capacitor between VBST and SW. The adaptive dead-time control prevents shoot-through current by ensuring both MOSFETs are never on simultaneously.

5-V Internal Regulator: The VREG5 pin provides a 5.5-V output from an internal linear regulator that drops VIN. This supplies the gate drive circuitry for both MOSFETs. A 1-uF bypass capacitor to GND is required. VREG5 is active only when EN is high, reducing quiescent current in shutdown.

Soft Start: An external capacitor on the SS pin controls the soft-start time. The SS pin sources 2.3 uA to charge the external capacitor, and the reference voltage tracks the SS pin voltage during startup. The soft-start time is calculated as tSS = CSS x VREF / ISS = CSS x 0.76 / 2.3 uA. For a 22-nF capacitor, tSS is approximately 7.3 ms. During prebiased startup, the converter does not sink current from the output.

Overcurrent Protection: The cycle-by-cycle overcurrent limit senses the peak inductor current through the low-side MOSFET RDSON during the off-time. If the current exceeds the limit (approximately 8 A typical), the high-side MOSFET is prevented from turning on in the next cycle. This provides fast protection against overloads and short circuits.

Output Discharge: When the converter is disabled (EN low or UVLO), the internal discharge MOSFET connects the output to GND through a 200-Ohm resistor, discharging the output capacitors. This ensures the output voltage drops to zero quickly when the converter is turned off, which is important for proper power sequencing.

Overvoltage Protection: If the output exceeds approximately 112 percent of the target voltage, the high-side MOSFET is turned off and the low-side MOSFET is turned on to discharge the output. This protects downstream circuitry from overvoltage damage.

Thermal Shutdown: The internal thermal shutdown circuit disables the converter when the junction temperature exceeds approximately 160 degrees C. The converter automatically restarts when the junction temperature drops by approximately 20 degrees C.