TLV1117IDCYR

The TLV1117 is an 800-mA LDO regulator from TI that serves as an enhanced, pin-compatible replacement for the ubiquitous AMS1117 and LM1117 series. The device supports input voltages from 2.7 V to 15 V, covering the common 3.3-V, 5-V, and 12-V supply rails found in consumer, industrial, and medical electronics.

The TLV1117 is available in both adjustable (1.25-13.8 V via external divider) and fixed-output (1.5V, 1.8V, 2.5V, 3.3V, 5V) versions. The IDCYR suffix specifically denotes the industrial-temperature adjustable version in SOT-223 tape-and-reel packaging. TI has updated the TLV1117 with a ‘new chip’ revision for fixed-output versions that significantly improves performance: quiescent current drops from 5 mA to 60 µA, output accuracy improves from ±3.75% to ±1%, and internal soft-start and foldback current limit are added.

For the adjustable version (TLV1117IDCYR), the output voltage is set by two external resistors: VOUT = 1.25 V × (1 + R1/R2). A minimum load of 1.7 mA (typical) must be maintained for stable regulation; this can be provided by the feedback resistor network. A minimum 10-µF tantalum output capacitor is required for stability; modern designs can substitute a 10-µF ceramic with appropriate ESR.

The SOT-223 (DCY) package is the industry-standard footprint for 800-mA LDOs, enabling direct drop-in replacement of AMS1117-3.3, LM1117-3.3, and LD1117 designs. The thermal tab (pin 2) is connected to VOUT and serves as the primary heat-dissipation path. The RθJA of 95.4°C/W (new chip, DCY) limits practical power dissipation to approximately 1 W without a thermal pad, corresponding to a 1.25-V dropout at 800 mA.

Key differentiators over the generic AMS1117 include: ±1% accuracy (fixed, new chip) vs ±2-3%; 60-µA IQ (fixed, new chip) vs 5-10 mA; internal soft-start (fixed, new chip) eliminating inrush current; and foldback current limit (fixed, new chip) reducing power dissipation during faults.

**Pass Transistor and Error Amplifier:** The TLV1117 uses a PNP pass transistor in an NPN/PNP Darlington configuration, which is the source of the relatively high 1.3-V dropout voltage (the PNP must maintain VBE + VCE(sat) across the pass element). The error amplifier compares the feedback voltage (from the internal divider for fixed, or external divider for adjustable) with the 1.205-V bandgap reference, driving the Darlington base to maintain regulation.

**Adjustable Output Configuration:** For the TLV1117IDCYR (adjustable), the ADJ/GND pin connects to the junction of external resistors R1 (VOUT to ADJ) and R2 (ADJ to GND). The ADJ pin sources ~50 µA of bias current, which creates a small error proportional to R2. The output voltage is VOUT = VREF × (1 + R1/R2) + IADJ × R2.

**New-Chip Enhancements (Fixed Versions):** The new chip revision replaces the NPN/PNP Darlington with a PMOS pass element for fixed-output versions, dramatically reducing IQ from 5 mA to 60 µA and enabling true shutdown with 1.5-µA IQ. The internal soft-start gradually ramps the output voltage, limiting inrush current. The foldback current limit reduces the current limit during output shorts (from 800 mA to ~200 mA), dramatically reducing power dissipation during faults: PD = VIN × IFOLDBACK instead of (VIN – VOUT) × ILIMIT.

**Thermal Protection:** An internal thermal shutdown circuit disables the output when junction temperature exceeds ~165°C, with ~10°C hysteresis. This prevents irreversible damage during sustained overloads.