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SN74LVC1G34DCKR

Single buffer gate, 1.65-5.5V, +/-24mA, 5.5V-tolerant input, SC70-5, level shift

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Manufacturer Part：

SN74LVC1G34DCKR

Package：

SC70-5 / SOT-353 (2.0 x 1.25 x 0.9 mm)

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Description

Product Overview

The SN74LVC1G34DCKR from Texas Instruments is a single buffer gate designed for 1.65V to 5.5V VCC operation in a 5-pin SC70 (DCK) package. Performing the Boolean function Y = A in positive logic, it supports 5.5V-tolerant inputs for voltage down-translation, provides +/-24 mA output drive at 3.3V, and features Ioff circuitry for partial-power-down and live-insertion applications.

Key Specifications

Function Single Buffer (non-inverting)
Supply Voltage 1.65V to 5.5V
Input Voltage Tolerance Up to 5.5V
Output Drive +/-24 mA @ 3.3V
Propagation Delay 4.1 ns max @ 3.3V
Quiescent Current 10 uA max
Ioff Support Yes (partial-power-down)
ESD Protection 2000V HBM, 1000V CDM
Operating Temperature -40°C to +125°C
Package SC70-5 (DCK) (2.0 x 1.25 x 0.9 mm)

Features

  • Ultra-small SC70-5 package for space-constrained designs
  • 5.5V-tolerant inputs for down-translation
  • Low 10 uA max quiescent current
  • +/-24 mA output drive at 3.3V
  • Ioff supports live insertion and back-drive protection
  • Latch-up exceeds 100 mA per JESD78 Class II

Applications

  • Logic level translation
  • Signal buffering and isolation
  • Portable electronics signal conditioning
  • Embedded system interface buffering
  • Hot-swap and live-insertion systems

The Texas Instruments SN74LVC1G34DCKR is a single non-inverting buffer gate from the 74LVC family, designed for 1.65V to 5.5V VCC operation in an ultra-compact 5-pin SC70 (DCK) package. It performs the Boolean function Y = A, providing signal buffering with 5.5V-tolerant inputs that accept voltages higher than the supply rail for down-translation from 5V or 3.3V to lower voltage domains. The device delivers +/-24 mA output drive at 3.3V with a maximum propagation delay of 4.1 ns. The Ioff feature ensures that inputs and outputs remain valid when VCC is 0V, supporting live insertion, partial-power-down mode, and back-drive protection in mixed-voltage systems. The tiny SC70-5 footprint makes it ideal for space-constrained portable and wearable applications.

The SN74LVC1G34DCKR consists of a single non-inverting buffer channel. The input stage accepts logic signals up to 5.5V regardless of VCC level, allowing the device to translate a higher-voltage signal down to the VCC output level. The CMOS push-pull output stage can source or sink 24 mA at 3.3V, providing adequate drive for downstream logic inputs or short PCB traces. The Ioff circuit disconnects the output stage when VCC is at 0V, preventing parasitic current paths from the input through internal ESD protection diodes to the unpowered supply. This enables safe signal routing in hot-swap systems where a card may be inserted into a powered backplane. The internal ESD protection structure provides 2000V HBM and 1000V CDM protection on all pins.

Pin Name Description
1 A Input
2 GND Ground
3 Y Output
4 N/C No Connect (reserved)
5 VCC Supply Voltage (1.65-5.5V)
  • Level Translation: Down-translating a 5V or 3.3V signal to 1.8V or 2.5V logic domain using 5.5V-tolerant input without dedicated level shifter ICs
  • Signal Isolation: Buffering a weak microcontroller GPIO output to drive multiple inputs with +/-24 mA drive capability
  • Hot-Swap Protection: Ioff circuit prevents back-driving in blade server and modular chassis systems with live insertion
  • Wearable Electronics: SC70-5 footprint minimizes board area in smartwatch and fitness tracker signal path routing
  • Battery-Powered Devices: 10 uA max ICC and 1.65V minimum VCC for ultra-low-power signal buffering in coin-cell applications
Model Brand Channels VCC (V) Package
SN74LVC1G34DBVR TI 1 1.65-5.5 SOT-23-5
NC7SZ34P5X onsemi 1 1.65-5.5 SC70-5
74LVC1G34GW NXP 1 1.65-5.5 SOT-353
SN74LVC1G125DCKR TI 1 (3-state) 1.65-5.5 SC70-5
SN74LVC2G34DCKR TI 2 1.65-5.5 SC70-6
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