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NC7SZ19P6X

1-of-2 decoder/demux, 1.65-5.5V, 3ns, MicroPak-6

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Manufacturer Part：

NC7SZ19P6X

Package：

MicroPak-6 (1.45 x 1.0 x 0.5 mm)

Brand：

Product Categories：

Integrated Circuits ICs

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Description

Product Overview

The onsemi NC7SZ19P6X is a 1-of-2 decoder/demultiplexer with an active-low enable in a MicroPak-6 package. Operating from 1.65 V to 5.5 V, it routes one input signal to one of two outputs based on a select input, suitable for address decoding and signal routing.

Key Specifications

Function	1-of-2 Decoder/Demultiplexer
Supply Voltage	1.65 V to 5.5 V
Propagation Delay	3.0 ns typ @ 3.0V
Select to Output	4.5 ns typ @ 3.0V
Output Drive	±24 mA @ 3.0V
I_CC Max	1 µA
Operating Temperature	-55 °C to +125 °C
Package	MicroPak-6 (1.45 x 1.0 mm)

Features

1-of-2 decoder with active-low enable
Wide supply range: 1.65 V to 5.5 V
Non-inverting data path
Fast propagation: 3.0 ns at 3.0 V
High output drive: ±24 mA at 3.0 V
Ultra-small MicroPak-6 package
Overvoltage tolerant inputs

Applications

Address decoding for memory-mapped peripherals
Signal demultiplexing and routing
Clock distribution to alternate destinations
Chip select generation from address lines

Product Introduction:NC7SZ19P6X Product Introduction

The onsemi NC7SZ19P6X is a single-gate 1-of-2 decoder/demultiplexer in an ultra-small MicroPak-6 package. It routes a single data input (D) to one of two outputs (Y0 or Y1) based on the state of the select (S) input, with the non-selected output driven high. An active-low enable (E) input forces both outputs high when de-asserted, providing bus isolation capability. The wide 1.65 V to 5.5 V supply range supports mixed-voltage designs, and the overvoltage-tolerant inputs allow direct connection to higher-voltage signal sources. The 3.0 ns propagation delay at 3.0 V enables use in high-speed address decoding and signal routing. The ±24 mA output drive can directly interface with multiple downstream logic inputs. The tiny MicroPak-6 package enables point-of-need signal routing in space-constrained designs, replacing larger SOIC/TSSOP decoder packages.

Working Principle:NC7SZ19P6X Working Principle

The NC7SZ19P6X implements a 1-of-2 decoder/demultiplexer using CMOS logic gates. The device has three inputs: data (D), select (S), and enable (E). When the enable input E is low (active), the data input D is routed to output Y0 (if S is low) or Y1 (if S is high). The non-selected output is driven to logic high. When E is high (inactive), both Y0 and Y1 are forced high regardless of D and S, providing a disable function. The truth table is: E=0, S=0 → Y0=D, Y1=1; E=0, S=1 → Y0=1, Y1=D; E=1 → Y0=1, Y1=1. This function is the complement of a 2:1 multiplexer — instead of selecting which input drives the output, the decoder selects which output the input drives. The CMOS implementation provides low static power consumption (1 µA max) with fast switching speeds. The non-inverting data path means the selected output directly follows the input without logical inversion.

Pin Description:NC7SZ19P6X Pin Definition and Functions

Pin	Name	Type	Function
1	E	Input	Enable (active low)
2	D	Input	Data input
3	GND	Ground	Ground
4	Y1	Output	Output 1 (active when S=1)
5	Y0	Output	Output 0 (active when S=0)
6	VCC	Power	Supply voltage (1.65-5.5V)

Application Scenarios:In which products and applications isNC7SZ19P6X used

Memory-mapped I/O address decoding
Chip select generation from address lines
Clock or data signal demultiplexing to two destinations
Peripheral enable routing in MCU-based systems

Alternative Models:What chips are recommended as replacements for NC7SZ19P6X

Manufacturer	Part Number	Package	Notes
TI	SN74LVC1G19DCKR	SC-70-6	1-of-2 decoder, similar function
Nexperia	74LVC1G19GW	SOT-363	1-of-2 decoder/demux
onsemi	MC74VHC1G19DFT1G	SC-88A	Similar decoder function
Diodes Inc	74LVC1G19DW-7	SOT-363	1-of-2 decoder