MAX7313AEG+T

The MAX7313AEG+T is a 16-port I/O expander with integrated 8-bit PWM LED intensity control, transition detection interrupt, and hot-insertion protection, manufactured by Analog Devices (formerly Maxim Integrated). It is designed for applications requiring both GPIO expansion and LED driving capability, such as keypad/LCD backlights, RGB LED drivers, and status indicator arrays.

The device provides 16 I/O ports (P0-P15), each individually configurable as either an open-drain current-sinking output rated at 50 mA and 5.5V, or a logic input with transition detection. A 17th port (INT/O16) can serve as a transition detection interrupt output or a general-purpose open-drain output. The open-drain outputs can drive LEDs directly or provide logic-level outputs with external resistive pull-up to 5.5V.

The integrated 8-bit PWM current drive provides sophisticated LED dimming control. The PWM architecture splits the 8-bit control into two fields: 4 bits of global control apply to all outputs simultaneously, providing 14 coarse intensity steps from fully off to fully on. Each output then has an individual 4-bit control that further subdivides the globally set current into 16 fine steps, yielding up to 224 (14 x 16) effective intensity levels per output. Alternatively, the current control can be configured as a single 8-bit register that sets all outputs uniformly.

Each output supports independent blink timing with two blink phases (Phase 0 and Phase 1). All LEDs can be individually set to be on or off during either blink phase, or to ignore blink control entirely. The blink period is register-controlled, enabling configurable flashing patterns for attention-getting indicators or status codes. The two-phase architecture allows grouping LEDs into independent blink groups without host processor intervention.

The MAX7313 communicates via a 400 kbps I2C/SMBus-compatible 2-wire serial interface. The device supports 64 unique I2C addresses through three address input pins (AD0, AD1, AD2), each connectable to GND, V+, SCL, or SDA, allowing up to 64 MAX7313 devices on a single I2C bus (1024 I/O ports total).

Hot-insertion protection is a key feature: all port pins, INT, SDA, SCL, and AD0-AD2 remain high-impedance during power-down (V+ = 0V) with up to 6V applied, preventing damage during live insertion/removal. Inputs are overvoltage protected to 5.5V.

The AEG+T suffix denotes the QSOP-24 package in tape and reel format (2,500 units per reel). The + indicates lead-free/RoHS-compliant. The device operates from 2V to 3.6V with a standby current of only 1.2 µA (typical), 3.6 µA (max). Operating temperature range is -40C to +125C. The MAX7313 is pin-compatible and software-compatible with the MAX7311 (without PWM), PCA9535, and PCA9555 I/O expanders.

The process technology is BiCMOS, combining bipolar output drive capability with CMOS logic efficiency. MSL rating is Level-1 (unlimited floor life at 260C peak reflow). ECCN is EAR99.

The MAX7313AEG+T operates as an I2C-addressable 16-port I/O expander with integrated PWM LED current control, combining GPIO expansion and LED driving in a single device.

I2C Interface and Addressing: The device communicates via a standard I2C/SMBus interface at up to 400 kbps. The 7-bit slave address is determined by the AD0, AD1, and AD2 pins, each of which can be connected to one of four states (GND, V+, SCL, SDA), yielding 64 unique addresses. This allows up to 64 MAX7313 devices on one I2C bus. The host writes to configuration, output, PWM, and blink registers, and reads from input, interrupt, and status registers using standard I2C read/write protocols.

I/O Port Configuration: Each of the 16 ports (P0-P15) is individually configurable through an 8-bit configuration register pair (one for P0-P7, one for P8-P15). When configured as an output, the port acts as an open-drain current sink capable of sinking up to 50 mA at up to 5.5V. When configured as an input, the port has transition detection circuitry that monitors for logic level changes. The input threshold is referenced to V+, and inputs are overvoltage protected to 5.5V, allowing direct connection to 5V logic systems even when V+ is as low as 2V.

PWM Current Control Architecture: The 8-bit PWM current control uses a hierarchical scheme. The 4-bit global intensity register (O0-O3) sets a coarse current level applied to all outputs simultaneously. This provides 14 effective intensity steps (fully off is step 0, then 14 steps from minimum to fully on). The 4-bit individual intensity register for each output (I0-I3) then divides the globally set current into 16 finer steps. The effective duty cycle for each output is proportional to (Global + 1) x (Individual + 1) / (16 x 16), giving up to 224 unique intensity levels. The PWM frequency is derived from an internal oscillator and is typically 1.5 kHz, fast enough to avoid visible flicker in LED applications.

Alternatively, the PWM control can be switched to a unified 8-bit mode where a single 8-bit register sets all outputs to the same intensity, useful for applications like uniform backlight dimming.

Two-Phase Blink Engine: Each output has two blink phase bits (Phase 0 and Phase 1). During Phase 0, the output can be set to on, off, or blink; during Phase 1, independently. All outputs share the same blink timing (controlled by the blink period register), but each output independently selects its behavior in each phase. The two-phase architecture enables grouping LEDs into synchronized blink patterns: for example, Phase 0 could have the red LEDs on and green LEDs off, while Phase 1 has the reverse, creating an alternating pattern without any host CPU overhead.

Transition Detection and Interrupt: When any input-configured port detects a logic level transition (rising or falling edge), the transition is latched in the transition detect register. The INT output (active-low, open-drain) asserts when any transition is detected, providing an interrupt to the host processor. The host reads the transition detect register to identify which port(s) changed, then clears the interrupt by reading the register. This eliminates the need for polling and reduces host CPU overhead.

Hot-Insertion Protection: During power-down (V+ = 0V), an internal circuit monitors V+ and holds all I/O pins, SDA, SCL, INT, and AD0-AD2 in a high-impedance state. This prevents parasitic conduction paths that could damage the device or corrupt the I2C bus when a card containing the MAX7313 is inserted into a powered system. The inputs can withstand up to 6V in this state, exceeding the 5.5V operating range.

Standby Mode: When all outputs are off and no I2C communication is occurring, the device enters a low-power standby state drawing only 1.2 µA (typical). The I2C interface remains active and can wake the device on address match. The transition detection circuit also remains active in standby, allowing interrupt-driven input monitoring at near-zero power.