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LMC6482IMMX/NOPB

Dual RRIO CMOS op amp, 20fA Ib, 1.5MHz, VSSOP-8

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Manufacturer Part：

LMC6482IMMX/NOPB

Package：

8-Pin VSSOP (3.0 x 3.0 x 0.9 mm)

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Description

Product Overview

The LMC6482IMMX/NOPB is a Texas Instruments dual CMOS rail-to-rail input/output op amp with 20fA input bias current, 82dB CMRR, 1.5MHz GBW, and 3V-15V supply. Packaged in VSSOP-8, -40C to +85C.

Key Specifications

Channels 2 (dual)
GBW 1.5 MHz
SR 1.3 V/us
Ib 20 fA typical
CMRR 82 dB
Supply 3 V to 15.5 V

Features

  • Rail-to-rail input and output
  • 20fA ultra-low input bias current
  • 82dB CMRR and PSRR
  • 1.5MHz gain bandwidth
  • 1.3V/us slew rate
  • 3V to 15V single supply
  • 600 ohm output drive capability

Applications

  • Precision data acquisition
  • Battery-powered instruments
  • Photodiode and pH measurement
  • Low-voltage signal conditioning

The LMC6482IMMX/NOPB is a Texas Instruments dual CMOS rail-to-rail input and output operational amplifier in an 8-pin VSSOP package. The 20fA typical input bias current is among the lowest available for any op amp, making the LMC6482 ideal for high-impedance sensor interfaces such as photodiode transimpedance amplifiers, pH electrodes, and piezoelectric sensors where input bias current causes DC offset errors. The rail-to-rail input common-mode range extends to both supply rails, enabling direct interfacing with signals at ground or V+ in single-supply systems. The rail-to-rail output swings within 20mV of the supply rails with 100kohm load and within 1V with 600ohm load, maximizing dynamic range in low-voltage battery-powered applications. The 82dB CMRR and PSRR provide excellent accuracy in the presence of common-mode and supply noise. The 1.5MHz GBW and 1.3V/us slew rate support moderate-speed signal conditioning. The device is specified for 3V, 5V, and 15V operation, with performance guaranteed over the -40C to +85C temperature range. The LMC6482 is an improved replacement for the TLC272 and TLC277. The IMMX suffix indicates VSSOP-8 tape-and-reel, and NOPB indicates lead-free (Pb-free) finish.

The LMC6482 uses a CMOS input stage with back-gate connected PMOS input pairs that achieve rail-to-rail input common-mode range. At common-mode voltages near the negative rail, one PMOS pair is active; near the positive rail, a complementary NMOS pair takes over, with a smooth transition region in between. The 20fA input bias current results from the MOSFET gate leakage, which is orders of magnitude lower than bipolar input bias currents. The output stage uses a class-AB CMOS push-pull configuration that drives the output to within millivolts of both supply rails. The 1.5MHz gain-bandwidth product is set by the dominant pole compensation capacitor. The 1.3V/us slew rate is determined by the available current to charge the compensation capacitor during large-signal transients. The 82dB CMRR is achieved through careful matching of the complementary input pairs and input-stage current sources. Each amplifier in the dual package operates independently with 150dB channel-to-channel isolation.

Pin Mnemonic Description
1 OUT A Output A
2 IN- A Inverting input A
3 IN+ A Non-inverting input A
4 V- Negative supply / GND
5 IN+ B Non-inverting input B
6 IN- B Inverting input B
7 OUT B Output B
8 V+ Positive supply
  • Photodiode transimpedance amplifier with 20fA input bias for minimal DC offset error
  • pH electrode and ion-selective sensor interface with sub-pA input current
  • Battery-powered portable instrument front-end with 3V rail-to-rail operation
  • Piezoelectric sensor charge amplifier with high-impedance input
Model Manufacturer Key Difference
LMC6482AIMX/NOPB TI SOIC-8 package
OPA2196IDR TI 36V, upgraded replacement
MCP6022 Microchip Similar RRIO CMOS
ADA4062-2 ADI Similar JFET input
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