The LD39050PU33R is a 3.3V 500mA ultra-low-noise LDO from ST in DFN-6 (2x2mm). It achieves 8uVrms output noise (10Hz-100kHz) using a filtered voltage reference architecture. The NR (Noise Reduction) pin connects to an external 10nF capacitor that filters the internal bandgap reference noise before it reaches the error amplifier. Since the reference noise is the dominant noise source in an LDO, this filtering dramatically reduces total output noise compared to standard LDOs (which typically have 30-100uVrms). The PSRR is 75dB at 1kHz and 40dB at 100kHz, making it effective for RF and analog supply filtering. Dropout voltage is 200mV at 500mA (3.3V output requires VIN >= 3.5V). The PMOS pass transistor provides ground current of only 40uA (typical), independent of load current. The EN pin (active HIGH, internal pull-down) enables/disables the output. In shutdown mode, quiescent current drops to 0.1uA. The DFN-6 package with exposed pad provides thermal resistance of 55C/W. Applications include RF transceivers, VCO power, PLL supplies, and ADC/DAC reference supplies where noise performance is critical.