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MFRC50001T/0FE112

ISO/IEC 14443 A RFID Reader IC, 13.56MHz, MIFARE Classic, 5V, SOIC-32 (Obsolete)

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Pieza del fabricante：

MFRC50001T/0FE112

Paquete：

SOIC-32

Marca：
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Descripción

Productos

The MFRC50001T/0FE112 from NXP Semiconductors is the original MIFARE reader solution, an ISO/IEC 14443 A compliant RFID reader IC operating at 13.56 MHz. Packaged in a SOIC-32 format, this device provides a complete contactless card reader solution with built-in MIFARE Classic authentication support, 64-byte FIFO buffer, and flexible host interface options including parallel, SPI, and EPP bus connections. Note: This device is marked as Obsolete.

Especificaciones

Frequency 13.56 MHz
Protocol ISO/IEC 14443 A / MIFARE Classic
Tensión de alimentación 5V
Current Consumption 25 mA (typical)
Host Interface Parallel / SPI / EPP
FIFO Buffer 64 bytes
Temperatura de funcionamiento -25°C to +85°C
Status Obsolete (No Longer Manufactured)

Características

  • ISO/IEC 14443 A reader with MIFARE Classic authentication
  • 64-byte FIFO buffer for efficient data handling
  • Multiple host interface options: parallel, SPI, EPP
  • Internal EEPROM for configuration storage
  • Programmable timer and CRC coprocessor
  • Antenna driver with direct output

Aplicaciones

  • Access control systems
  • Public transportation ticketing
  • E-payment terminals
  • Contactless card readers
  • Industrial identification systems

The MFRC50001T/0FE112 from NXP Semiconductors is the original MIFARE reader IC designed for ISO/IEC 14443 A contactless communication at 13.56 MHz. It integrates the complete analog and digital functionality needed for MIFARE Classic card reading, including authentication, encryption, and anti-collision handling. The device features a 64-byte FIFO buffer, programmable CRC coprocessor, and supports parallel, SPI, and EPP host interfaces. Housed in a SOIC-32 package, it operates from a single 5V supply with 25mA typical current consumption. Note: This device has been declared Obsolete and is no longer in production.

The MFRC500 generates a 13.56 MHz RF field through an external antenna to communicate with contactless cards. It modulates the carrier using 100% ASK for Type A communication and demodulates the load-modulated signal from the card. The internal MIFARE crypto engine handles the three-pass mutual authentication protocol with MIFARE Classic cards. The 64-byte FIFO buffer manages data flow between the host and the RF interface, while the CRC coprocessor offloads checksum calculations. Multiple interrupt sources enable efficient host processing through the IRQ pin.

Pin Nombre Función
1 SVDD 5V Supply for internal regulator
2 SOUT Serial data output (SPI)
3 SIN Serial data input (SPI)
4 SCK Serial clock (SPI)
5 NSS Slave select (SPI)
6-9 D0-D3 Parallel data bus
10-13 D4-D7 Parallel data bus
14 IRQ Interrupt request output
15 RSTPD Reset / Power-down
16 ALE Address latch enable
17 A0 Address line 0
18 A1 Address line 1
19 A2 Address line 2
20 CS Chip select
21 RD/WR Read/Write strobe
22 TEST Test pin (connect to GND)
23-24 TVDD/TX1 Transmitter supply/output 1
25-26 TX2/GND Transmitter output 2/Ground
27-28 RX/VMID Receiver input/Mid-voltage
29 AVDD Analog 5V supply
30 DVDD Digital 5V supply
31 EA External address (tie to GND)
32 SGND Signal ground
  • Access control and door entry systems using MIFARE Classic cards
  • Public transportation automated fare collection terminals
  • E-payment and loyalty card readers for retail
  • Industrial asset tracking and identification systems
  • Hotel room key card systems
Modelo Notas
MFRC52201T/0FE112 Direct replacement, adds SPI-only mode, lower power
MFRC53101T/0FE112 Upgraded version, supports ISO 14443 A/B, 848kbps
CLRC663 NXP next-gen reader, multi-protocol, active
Si523 Domestic alternative with auto card detect (ACD)
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