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HEF4094BT

8-bit shift register, storage register, 3-state output, SOIC-16, cascade, serial-to-parallel

11136

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Pieza del fabricante：

HEF4094BT

Paquete：

SOIC-16 (9.90 x 3.90 x 1.50 mm)

Descripción

Productos

The HEF4094BT from Nexperia is an 8-bit serial-in/serial-or-parallel-out shift register with storage register and 3-state outputs in a SOIC-16 package. With separate shift and storage clocks, it enables serial-to-parallel data conversion and cascaded display driving.

Especificaciones

Función	8-bit shift-and-store register
Tensión de alimentación	3 V to 15 V
Outputs	8 parallel (3-state) + 2 serial cascade
Max Clock Frequency	28 MHz+ (at 15V)
Corriente de salida	+/-3.4 mA (min at 5V)
Temperatura de funcionamiento	-40C to +125C

Características

8-bit shift register with separate storage register
3-state parallel outputs for bus sharing
Dual serial outputs (QS1, QS2) for easy cascading
Separate shift (CP) and storage (STR) clocks
Output enable (OE) for 3-state bus control
Wide 3V to 15V supply range with CMOS low power

Aplicaciones

LED display multiplexing and driver cascading
Serial-to-parallel data expansion for MCU I/O
Remote control holding register for industrial automation
Cascaded shift register chains for large display driving

Introducción del producto:HEF4094BT Presentación del producto

The HEF4094BT from Nexperia is an 8-bit serial-in/serial-or-parallel-out shift register with a storage register and 3-state outputs in a SOIC-16 package. The device accepts serial data at the D input and shifts it through an 8-bit shift register on the low-to-high transition of the clock (CP). The shift register data is transferred to an 8-bit storage register when the strobe (STR) input is high. The storage register outputs (QP0-QP7) are enabled when the output enable (OE) is high, and placed in the high-impedance state when OE is low. Two serial cascade outputs are provided: QS1 updates on the rising clock edge for fast cascade operation, while QS2 updates on the falling clock edge for slow-edge cascade compatibility. This dual-output feature enables flexible cascading of multiple devices for driving large LED displays or expanding I/O channels. The separate shift and storage clocks allow new data to be shifted in while the current output data remains stable, eliminating display flicker in multiplexed applications. The device operates from 3V to 15V with CMOS low power dissipation.

Principio de funcionamiento:HEF4094BT Principio de funcionamiento

The HEF4094BT combines an 8-bit shift register with an 8-bit storage register and 3-state output buffers. (1) Shift Register: Serial data at the D input is shifted through 8 flip-flop stages on each rising edge of the CP clock. After 8 clock cycles, the first data bit appears at stage 7 (the last stage). (2) Cascade Outputs: QS1 provides the stage 7 output on the rising CP edge for fast cascade connection. QS2 provides the same data on the falling CP edge for slow-edge cascade. These outputs connect to the D input of the next HEF4094BT in the chain. (3) Storage Register: When STR is high, the shift register contents are copied into the parallel storage register on the next CP rising edge. The storage register holds the output data stable while new data is being shifted in. (4) 3-State Outputs: The QP0-QP7 outputs reflect the storage register contents when OE is high. When OE is low, all parallel outputs are in the high-impedance state, allowing multiple devices to share the same output bus. The OE control does not affect the shift or storage register contents. (5) Cascading: Multiple HEF4094BT devices can be cascaded by connecting QS1 or QS2 of one device to the D input of the next, with all devices sharing the same CP, STR, and OE signals.

Descripción de la clavija:HEF4094BT Definición y funciones de las clavijas

Pin	Nombre	Tipo	Función
1	STR	Entrada	Strobe (storage register load)
2	D	Entrada	Entrada de datos serie
3	CP	Entrada	Clock (shift register, rising edge)
4	QP0	Salida	Parallel output bit 0 (3-state)
5	QP1	Salida	Parallel output bit 1 (3-state)
6	QP2	Salida	Parallel output bit 2 (3-state)
7	QP3	Salida	Parallel output bit 3 (3-state)
8	VSS	Suelo	Tierra (0V)
9	QS1	Salida	Serial cascade output (rising edge)
10	QS2	Salida	Serial cascade output (falling edge)
11	QP7	Salida	Parallel output bit 7 (3-state)
12	QP6	Salida	Parallel output bit 6 (3-state)
13	QP5	Salida	Parallel output bit 5 (3-state)
14	QP4	Salida	Parallel output bit 4 (3-state)
15	OE	Entrada	Output enable (active high)
16	VDD	Potencia	Supply voltage (3-15V)

Application Scenarios:In which products and applications isHEF4094BT usado

LED display multiplexing and driver cascading with 3-state outputs
Serial-to-parallel data expansion for MCU I/O with storage register
Remote control holding register for industrial automation
Cascaded shift register chains for large LED display driving with QS1/QS2

Alternative Models:What chips are recommended as replacements for HEF4094BT

Fabricante	Número de pieza	Paquete	Notas
TI	CD4094BE	DIP-16	Through-hole equivalent
Nexperia	74HC595D	SOIC-16	HC family, 2-6V, popular alternative
TI	SN74HC595DR	SOIC-16	HC family, pin-different
onsemi	MC74HC595ADTR2G	TSSOP-16	HC family, smaller package