AD7367BRUZ-500RL7

The AD7367BRUZ-500RL7 from Analog Devices is a dual-channel, 14-bit, 500kSPS simultaneous sampling successive approximation register (SAR) analog-to-digital converter. The key feature of this device is its ability to simultaneously sample two analog inputs, ensuring that both channels are captured at exactly the same instant, which is critical for applications requiring phase-accurate measurement of multi-channel signals such as motor phase currents, three-phase power, and differential voltage/current pairs. The dual sample-and-hold amplifiers capture both inputs simultaneously, and the ADC then sequentially converts each channel. The analog input range is pin-selectable between +/-5V and +/-10V (bipolar), eliminating the need for external level-shifting circuitry in many industrial applications that use +/-10V signal levels. The internal 2.5V reference with reference buffer simplifies design by eliminating the external reference and buffer amplifier, though an external reference can be used for higher accuracy. The SPI-compatible serial interface supports clock rates up to 50MHz and features a daisy-chain mode that allows multiple AD7367 devices to share a single CS line, enabling multi-channel data acquisition systems with minimal wiring. The conversion result for each channel is provided as a 14-bit two’s complement value, making it directly compatible with DSP and microcontroller arithmetic. The -500RL7 suffix indicates the 500kSPS speed grade and tape-and-reel packaging.

The AD7367BRUZ-500RL7 operates as a dual simultaneous sampling SAR ADC. Key subsystems include: (1) Dual Sample-and-Hold – two identical sample-and-hold circuits capture the voltage on VIN_A and VIN_B simultaneously when the CONVST signal is asserted; both inputs are sampled at the same instant, preserving the phase relationship between the two channels; the hold capacitors maintain the sampled voltage during the subsequent conversion; (2) SAR ADC Core – a 14-bit successive approximation register ADC converts each held sample; the conversion uses a binary search algorithm with a capacitive DAC; the ADC converts channel A first, then channel B; each conversion takes approximately 1.6 microseconds; the total throughput is 500kSPS per channel (1 MSPS total); (3) Input Range Selection – the RANGE pin selects between +/-5V and +/-10V input ranges; in +/-10V mode, the input attenuator divides the signal by 4 before the ADC core (which has a +/-2.5V range); in +/-5V mode, the attenuator divides by 2; the input impedance is 1.4MOhm, allowing direct connection to many signal sources without buffering; (4) Reference – an internal 2.5V bandgap reference with on-chip buffer drives the ADC DAC; the REFSEL pin selects internal or external reference; when using an external reference, the on-chip buffer reduces the reference drive requirement; (5) SPI Interface – a standard SPI interface (CS, SCLK, SDI, SDO) with daisy-chain capability; the conversion results are clocked out MSB first as 14-bit two’s complement values; in daisy-chain mode, multiple devices are connected in series (SDO of device N connects to SDI of device N-1), allowing all channels to be read with a single CS assertion.

• Motor current sensing: simultaneously sample 2 phase currents via shunt resistors, +/-5V range matches amplifier output, 500kSPS for FOC at 20kHz PWM
• Power metering: simultaneously sample voltage and current for instant power calculation, +/-10V range for PT/CT secondary inputs
• Multi-device DAQ: daisy-chain 4x AD7367 for 8-channel simultaneous sampling on a single SPI bus
• Protection relay: simultaneous V and I sampling for distance relay impedance calculation, 14-bit resolution for accuracy