DS1307Z+T&R

The DS1307Z+T&R from Analog Devices (formerly Maxim Integrated/Dallas Semiconductor) is one of the most widely used real-time clock ICs in the electronics industry. It provides a complete BCD-coded clock/calendar with automatic leap-year compensation, plus 56 bytes of battery-backed non-volatile SRAM, all accessible through a simple I2C serial interface.

The DS1307 is the classic Arduino RTC chip, popularized by the widely-used DS1307 breakout board modules that combine the DS1307 with a 32.768 kHz crystal and a CR2032 coin cell battery. These modules are among the most common and affordable RTC solutions for hobbyist and maker projects.

The clock/calendar function provides seconds, minutes, hours (12-hour with AM/PM or 24-hour format), day of the week, date, month, and year. The year field is two digits (00-99) with automatic leap-year compensation, valid up to year 2100. The time and date registers are located at addresses 00h-06h in the register map.

The 56 bytes of NV SRAM (addresses 08h-3Fh) are battery-backed and provide unlimited read/write cycles, unlike EEPROM which has limited write endurance. This makes the SRAM suitable for storing configuration data, calibration values, or logging data that changes frequently.

The I2C interface operates in standard mode (100 kHz maximum). The DS1307 always operates as a slave device with a fixed 7-bit address of 0x68 (binary 1101000). The interface supports both byte-write and burst-read operations, allowing the entire time/date to be read in a single I2C transaction.

The automatic power-fail detect and switch circuitry monitors the VCC supply. When VCC drops below the battery voltage (VBAT), the device automatically switches to battery power, maintaining timekeeping and SRAM data. The battery backup current is typically less than 500 nA with the oscillator running, which allows a CR2032 coin cell (220 mAh) to maintain timekeeping for over 50 years in theory (though battery self-discharge typically limits practical life to 5-10 years).

The programmable square-wave output (SQW/OUT pin) can generate four frequencies: 1 Hz, 4.096 kHz, 8.192 kHz, and 32.768 kHz, controlled by the RS0 and RS1 bits in the control register (address 07h). The output can also be used as a simple logic output controlled by the OUT bit when the square-wave is disabled. The 1 Hz output is particularly useful for generating a 1-second interrupt for MCU timekeeping synchronization.

The DS1307 requires an external 32.768 kHz crystal connected between the X1 and X2 pins. The crystal and associated load capacitors must be placed as close to the IC as possible to minimize parasitic capacitance and ensure reliable oscillation. The typical load capacitance for the DS1307 is 12.5 pF.

The Z suffix indicates the SOIC-8 (150 mil) surface-mount package. The plus suffix indicates lead-free/RoHS compliance. The T&R suffix indicates tape and reel packaging for automated SMT assembly. The commercial temperature range version (0 to 70 degrees C) is designated by the Z suffix without an N; the industrial temperature range version (-40 to 85 degrees C) is designated by ZN.

The DS1307Z+T&R operates as an I2C slave real-time clock with battery backup, maintaining accurate time and date through an external 32.768 kHz crystal oscillator.

Oscillator Circuit: The DS1307 contains an internal oscillator circuit that requires an external 32.768 kHz tuning-fork crystal connected between X1 and X2. The oscillator runs continuously as long as power is available from VCC or VBAT. The oscillator circuit includes internal load capacitors designed for a crystal with 12.5 pF load capacitance. The oscillator can be disabled by setting the CH (Clock Halt) bit (bit 7 of the seconds register at address 00h) to 1; when CH is 0 (default after power-up with valid VBAT), the oscillator runs normally.

Clock/Calendar Logic: The 32.768 kHz oscillator output is divided down through a 15-stage binary ripple counter to produce a 1 Hz tick. Each 1 Hz tick increments the seconds counter. The seconds counter rolls over at 60 to increment minutes, which rolls over at 60 to increment hours, and so on. The day-of-week counter increments when hours rolls over from 23 to 00 (midnight). The date counter increment depends on the month and year (automatic leap-year compensation for February). All time and date values are stored in BCD (Binary-Coded Decimal) format in the register map.

I2C Slave Interface: The DS1307 operates as an I2C slave device with a fixed 7-bit address of 0x68 (1101000 binary). The master initiates communication by sending a START condition followed by the slave address and a R/W bit. For write operations, the master sends the register address pointer followed by data bytes. For read operations, the master first writes the register address pointer, then issues a repeated START and reads data bytes. The register address pointer auto-increments after each byte read, allowing the entire time/date (7 bytes) to be read in a single burst.

Power-Fail Detect and Switch: The device continuously monitors VCC. When VCC falls below VBAT plus approximately 0.2 V, the internal power switch disconnects VCC and connects VBAT to power the oscillator and SRAM. In this battery-backup mode, the I2C interface is disabled and the SQW/OUT pin is driven low. When VCC rises above VBAT plus approximately 0.2 V, the device switches back to VCC power, the I2C interface becomes active, and the SQW/OUT pin resumes its programmed function. The switching is glitch-free and does not affect timekeeping accuracy.

BCD Timekeeping Registers: The time and date are stored in seven registers (00h-06h) in BCD format. Each digit of the time/date occupies a separate 4-bit nibble: for example, the seconds register stores the tens digit of seconds in bits 6-4 and the units digit in bits 3-0. Bit 7 of register 00h is the CH (Clock Halt) bit. Bit 6 of register 02h is the 12/24-hour mode select. In 12-hour mode, bit 5 is the AM/PM indicator. The day-of-week register (03h) is a simple counter from 1 to 7 that increments at midnight.

Square-Wave Output: The SQW/OUT pin can generate a square wave at one of four frequencies (1 Hz, 4.096 kHz, 8.192 kHz, 32.768 kHz) when the SQWE bit (bit 4 of the control register at 07h) is set to 1. The frequency is selected by the RS1:RS0 bits (bits 1:0 of the control register). When SQWE is 0, the SQW/OUT pin outputs the logic level programmed in the OUT bit (bit 7 of the control register).

NV SRAM: The 56 bytes of NV SRAM (addresses 08h-3Fh) are general-purpose read/write memory that is maintained by battery backup when VCC fails. Unlike EEPROM, there are no write cycle limits or write delays, making it suitable for frequently updated data such as alarm settings, calibration values, or rolling logs.