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CS5532-BSZ

24-bit delta-sigma ADC, 2-ch, chopper-stabilized, 4800SPS, SSOP-20

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Manufacturer Part：

CS5532-BSZ

Package：

20-SSOP (5.30 x 7.20 mm)

Brand：

Product Categories：

Analog Linear ICs, Integrated Circuits ICs

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Description

Product Overview

The CS5532-BSZ is a Cirrus Logic 24-bit delta-sigma ADC with ultra-low-noise programmable gain instrumentation amplifier (PGIA). It features 2-channel differential input, gains of 1x to 64x, 6 nV/sqrt(Hz) noise at 0.1 Hz, and 20 selectable output word rates from 6.25 to 3840 SPS. The device is packaged in a 20-pin SSOP rated for -40C to +85C.

Key Specifications

Resolution	24 bits
Channels	2 differential
PGIA Gains	1x, 2x, 4x, 8x, 16x, 32x, 64x
Input Noise	6 nV/sqrt(Hz) at 0.1 Hz
Linearity	0.0007% FS
Word Rates	6.25 to 3840 SPS

Features

24-bit delta-sigma architecture
Chopper-stabilized PGIA (1x-64x)
6 nV/sqrt(Hz) noise, no 1/f at 64x
0.0007% FS linearity error
Up to 23 bits noise-free resolution
2-channel differential multiplexer
SPI/Microwire serial interface
Selectable 50/60 Hz rejection

Applications

Weigh scales and load cells
Industrial process control
Precision instrumentation
Medical measurement devices

Product Introduction:CS5532-BSZ Product Introduction

The Cirrus Logic CS5532-BSZ is a 24-bit delta-sigma analog-to-digital converter with two differential input channels and chopper-stabilized input amplifier, delivering 24-bit noise-free resolution at data rates up to 4800 SPS. The chopper-stabilized amplifier architecture virtually eliminates 1/f (flicker) noise and input offset drift—critical for weigh scale and strain gauge applications where DC accuracy over temperature is paramount. The input multiplexer supports two differential channels with on-chip cross-point multiplexing, allowing simultaneous measurement of multiple bridge circuits. The programmable gain amplifier (PGA) offers gains of 1x, 2x, 4x, 8x, 16x, 32x, and 64x, enabling direct connection of load cell outputs (typically 2 mV/V) without external instrumentation amplifiers. At gain 64x, the input-referred noise is 8.8 nV/sqrt(Hz), allowing resolution of microvolt-level signals. The SPI-compatible serial interface supports daisy-chain connection of multiple CS5532 devices on a single SPI bus, reducing wiring complexity in multi-channel systems. The device includes on-chip calibration registers for system-level offset and gain correction, compensating for external circuit tolerances. Power consumption is 35 mW from +/-5V supplies, with a power-down mode reducing consumption to 5 mW.

Working Principle:CS5532-BSZ Working Principle

The CS5532 uses a 4th-order delta-sigma modulator operating at an oversampled clock rate (MCLK = 4.9152 MHz typical). The modulator converts the analog input into a 1-bit data stream at the modulator frequency, and a digital decimation filter reduces the output rate to the user-selected data rate (3.84 to 4800 SPS in 15 steps) while increasing the effective resolution. The chopper-stabilized input amplifier eliminates 1/f noise and offset drift by periodically swapping the amplifier input polarity and averaging the results—any DC offset appears as a common-mode signal and is canceled in the averaging process. This chopping occurs at a rate well above the signal bandwidth, ensuring that the chopping artifacts are outside the passband of the digital filter. The PGA amplifies the differential input signal before the modulator, with gain accuracy of +/-0.5% across all gain settings. System-level calibration is performed by applying known reference signals to the inputs and storing the correction coefficients in on-chip calibration registers. The self-calibration mode performs a quick offset and gain calibration using internal reference connections, while system calibration uses external reference signals for end-to-end calibration that includes external circuit errors.

Pin Description:CS5532-BSZ Pin Definition and Functions

Pin	Mnemonic	Description
1-2	AIN1+/AIN1-	Channel 1 differential analog input
3-4	AIN2+/AIN2-	Channel 2 differential analog input
5	VA+	Analog positive supply (+5V)
6	VA-	Analog negative supply (-5V)
7	AGND	Analog ground
8	VREF+	Positive reference input
9	VREF-	Negative reference input
10	VD+	Digital supply (+5V or +3V)
11	DGND	Digital ground
12	SDO	Serial data output
13	SDI	Serial data input
14	SCLK	Serial clock input
15	CS	Chip select (active low)
16	AO	Address/output configuration
17	RDY	Data ready output (active low)
18-19	MCLK/XCLK	Master clock input/output
20	RESET	Reset input (active low)

Application Scenarios:In which products and applications isCS5532-BSZ used

Precision weigh scale with 64x PGA directly digitizing 2mV/V load cell output, chopper-stabilized amplifier eliminating drift for OIML R76 Class III approval
Multi-axis strain gauge measurement system with 2-channel multiplexing and on-chip system-level gain/offset calibration
Industrial pressure transmitter with 24-bit resolution enabling 0.01% full-scale accuracy across -40C to +85C
Laboratory instrumentation with daisy-chained SPI connecting 8 CS5532 devices for 16-channel data acquisition

Alternative Models:What chips are recommended as replacements for CS5532-BSZ

Model	Manufacturer	Key Difference
CS5532-ASZ	Cirrus Logic	Same device with A-grade specs (lower noise)
ADS1256	TI	24-bit, 30kSPS, 8-ch, higher speed, no chopper
AD7124-4	ADI	24-bit, 4.8kSPS, 4-ch, integrated reference
NAU7802	Nuvoton	24-bit, 320SPS, 2-ch, built-in LDO, lower cost