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CD4019BE

Quad AND-OR select gate, 4-channel 2:1 MUX, CMOS 3-18V, PDIP-16

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Manufacturer Part：

CD4019BE

Package：

PDIP-16 (19.3 x 9.4 x 4.57mm, 2.54mm pitch, through-hole)

Brand：

Product Categories：

Integrated Circuits ICs, Interface ICs

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Description

Product Overview

The CD4019BE from Texas Instruments is a quad AND-OR select gate that chooses between two 4-bit data sources under control of two select lines — a 4-channel 2:1 multiplexer built from AND-OR logic in a 16-pin PDIP package.

Key Specifications

Function	Quad AND-OR select gate (4-channel 2:1 multiplexer)
Technology	CD4000B CMOS
Supply Voltage	3V to 18V
Channels	4 (independent)
Data Inputs	A0,A1,A2,A3 and B0,B1,B2,B3
Select Inputs	KA (selects A group), KB (selects B group)
Propagation Delay	150ns typical @ VDD=10V
Operating Temperature	-55°C to +125°C
Package	PDIP-16 (19.3 x 9.4mm)

Features

Four 2:1 multiplexer channels
Two select inputs (KA, KB) for AND-OR selection
Can select A only, B only, both, or neither
3V-18V wide supply range

Applications

Data source selection
AND-OR logic combination
Parallel data switching
Source multiplexing

Product Introduction:CD4019BE Product Introduction

The CD4019BE from Texas Instruments is a quad AND-OR select gate that functions as a 4-channel 2:1 data multiplexer with a unique twist: two independent select inputs (KA and KB) allow four operating modes instead of the usual two. Each output Yi = (KA·Ai) + (KB·Bi). When KA=1 and KB=0: Yi = Ai (select source A). When KA=0 and KB=1: Yi = Bi (select source B). When KA=1 and KB=1: Yi = Ai + Bi (logical OR of both sources). When KA=0 and KB=0: Yi = 0 (all outputs forced LOW). The OR mode (both selects HIGH) is unique to the CD4019 — standard multiplexers don’t provide this. It’s useful for combining two data sources with OR logic, such as merging two sets of active-HIGH control lines. The CD4019 can also implement AND logic by using the complemented inputs. The BE suffix denotes the PDIP-16 package.

Working Principle:CD4019BE Working Principle

Each channel of the CD4019BE performs Yi = (KA · Ai) + (KB · Bi). The two AND gates per channel select which data input contributes to the output: KA gates the A input; KB gates the B input. The OR combines the selected inputs. Operating modes: (1) KA=1, KB=0: Yi=Ai (select A); (2) KA=0, KB=1: Yi=Bi (select B); (3) KA=1, KB=1: Yi=Ai+Bi (OR both sources); (4) KA=0, KB=0: Yi=0 (all outputs LOW, disabled). For standard 2:1 multiplexing: use KA and KB as complementary select signals (KA = SELECT, KB = NOT SELECT). When SELECT=1, A passes; when SELECT=0, B passes. For OR mode: tie KA and KB both HIGH; each output is the OR of the corresponding A and B inputs. For AND mode: use inverted data on B inputs; Yi = Ai·Bī when KA=1, KB=1 (by DeMorgan’s, the AND-OR becomes AND if B is inverted). The CD4019 is simpler than the CD4051 analog multiplexer (which passes analog signals) — the CD4019 is purely digital logic.

Pin Description:CD4019BE Pin Definition and Functions

Pin	Name	Type	Description
1	KB	Input	Select B (gates B0-B3 to outputs when HIGH)
2	A3	Input	Channel 3 data input A
3	B3	Input	Channel 3 data input B
4	Y3	Output	Channel 3 output (KA·A3 + KB·B3)
5	A2	Input	Channel 2 data input A
6	B2	Input	Channel 2 data input B
7	Y2	Output	Channel 2 output (KA·A2 + KB·B2)
8	VSS	Power	Ground
9	Y1	Output	Channel 1 output (KA·A1 + KB·B1)
10	B1	Input	Channel 1 data input B
11	A1	Input	Channel 1 data input A
12	Y0	Output	Channel 0 output (KA·A0 + KB·B0)
13	B0	Input	Channel 0 data input B
14	A0	Input	Channel 0 data input A
15	KA	Input	Select A (gates A0-A3 to outputs when HIGH)
16	VDD	Power	Supply (3V to 18V)

Application Scenarios:In which products and applications isCD4019BE used

2:1 Data MUX: Source A → A0-A3; Source B → B0-B3; SELECT → KA; NOT SELECT → KB; Y0-Y3 = selected 4-bit source
OR Combiner: KA=KB=1; Yi = Ai+Bi; merge two sets of active-HIGH control signals; any active input drives output
Gated Data: KA = enable; KB = 0; Yi = enable·Ai; data passes only when enable is HIGH; forced LOW when disabled
Parallel Switch: Two 4-bit registers → A0-A3 and B0-B3; KA/KB select which register drives the bus; register file output select

Alternative Models:What chips are recommended as replacements for CD4019BE

Model	Manufacturer	Key Difference	Package	Supply
CD4019BM	TI	SOIC-16 surface-mount version with identical logic function and 3-18V range	SOIC-16	3-18V
CD4019BE	TI	Through-hole DIP version for prototyping and legacy board repair	DIP-16	3-18V
HEF4019BT	NXP	Pin-compatible CMOS version with improved ESD protection and 3-15V supply	SOIC-16	3-15V
MC144019BDR2G	onsemi	Pin-compatible equivalent with RoHS compliance and AEC-Q100 automotive option	SOIC-16	3-18V
74HC157D	TI/Nexperia	HC CMOS version with higher speed and 2-6V supply for modern logic systems	SOIC-16	2-6V
74HC157N	TI/Nexperia	HC CMOS through-hole version for prototyping with 2-6V supply range	DIP-16	2-6V
74HCT157D	Nexperia	HCT version with TTL-compatible inputs for mixed 5V TTL/CMOS systems	SOIC-16	4.5-5.5V

CD4019 is the CMOS 4000-series quad 2:1 multiplexer operating over the wide 3-18V supply range. The HEF4019 (NXP) and MC144019 (onsemi) are direct pin-compatible equivalents. For higher speed at the cost of narrower voltage range, the 74HC157 HC/HCT families offer significantly faster propagation delay and lower power consumption at 2-6V. Surface-mount versions use the BM/M suffix (SOIC); through-hole versions use the BE suffix (DIP).