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CD4013BE

Dual D flip-flop, CMOS, 3-18V, set/reset, PDIP-14

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Manufacturer Part：

CD4013BE

Package：

PDIP-14 (19.3 x 6.35 x 4.57mm, 2.54mm pitch, through-hole)

Brand：

Product Categories：

Integrated Circuits ICs, Interface ICs

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Description

Product Overview

The CD4013BE from Texas Instruments contains two independent D-type flip-flops with direct set and reset, positive-edge triggered, in a 14-pin PDIP package — the CMOS equivalent of the 7474 for low-power applications.

Key Specifications

Number of Flip-Flops	2 (dual, independent)
Technology	CD4000B CMOS
Trigger Type	Positive-edge (rising edge of CLK)
Supply Voltage	3V to 18V
Max Clock Frequency	16MHz typical @ VDD=15V; 8MHz @ 10V
Set (S)	Active HIGH (asynchronous, sets Q=1)
Reset (R)	Active HIGH (asynchronous, sets Q=0)
Setup Time	20ns typical @ VDD=10V
Operating Temperature	-55°C to +125°C
Package	PDIP-14 (19.3 x 6.35mm)

Features

Dual D-type flip-flops, positive-edge triggered
Asynchronous set and reset (active HIGH)
Wide supply voltage: 3V to 18V
Push-pull outputs (Q and NOT-Q)
CMOS 4000B: very low power consumption

Applications

Data latch / register
Frequency divider (toggle mode)
Debounce circuit
One-shot / monostable
Sync logic in battery-powered designs

Product Introduction:CD4013BE Product Introduction

The CD4013BE from Texas Instruments contains two independent D-type flip-flops with direct set (S, active HIGH) and reset (R, active HIGH) inputs. On each rising edge of the clock, the data at the D input is transferred to the Q output. The asynchronous set and reset override the clocked operation: S=1 forces Q=1, R=1 forces Q=0. The CD4013 is the CMOS equivalent of the TTL 7474, with the advantage of 3V-18V supply range and near-zero static power consumption, making it ideal for battery-powered and low-voltage applications. In toggle mode (D connected to NOT-Q), the CD4013 divides the clock frequency by 2. A single CD4013 can implement a switch debounce circuit (D=1, CLK=button, R=reset), or a set-reset latch (using the S and R inputs without clock). The BE suffix denotes the PDIP-14 package with full temperature range.

Working Principle:CD4013BE Working Principle

The CD4013BE D-type flip-flop captures the value at the D input on the rising edge of the clock and holds it at Q until the next rising edge. The truth table: CLK rising edge with D=0 → Q=0; CLK rising edge with D=1 → Q=1. When CLK is not rising, Q holds its value regardless of D. The asynchronous inputs override the clock: when S=HIGH, Q=1 immediately (regardless of CLK and D); when R=HIGH, Q=0 immediately. When both S and R are HIGH, both Q and NOT-Q go HIGH (invalid state); the final state after both are released is indeterminate. For normal clocked operation, S and R must both be LOW. For toggle mode: connect NOT-Q to D; each rising clock edge toggles Q, dividing the clock by 2. For a data latch: D receives data, CLK rising edge captures it. For debounce: D=VDD, CLK=switch through RC filter (R=100kΩ, C=0.1µF), R=reset button; the RC filter ensures only one clean edge reaches CLK.

Pin Description:CD4013BE Pin Definition and Functions

Pin	Name	Type	Description
1	1Q	Output	Flip-flop 1 Q output
2	1NOT-Q	Output	Flip-flop 1 NOT-Q output
3	1CLK	Input	Flip-flop 1 clock (rising edge)
4	1R	Input	Flip-flop 1 reset (active HIGH, sets Q=0)
5	1D	Input	Flip-flop 1 data input
6	1S	Input	Flip-flop 1 set (active HIGH, sets Q=1)
7	VSS	Power	Ground
8	2S	Input	Flip-flop 2 set (active HIGH)
9	2D	Input	Flip-flop 2 data input
10	2R	Input	Flip-flop 2 reset (active HIGH)
11	2CLK	Input	Flip-flop 2 clock (rising edge)
12	2NOT-Q	Output	Flip-flop 2 NOT-Q output
13	2Q	Output	Flip-flop 2 Q output
14	VDD	Power	Supply (3V to 18V)

Application Scenarios:In which products and applications isCD4013BE used

Toggle / Divide-by-2: 1NOT-Q → 1D; clock on 1CLK; 1Q = clock/2; cascade for divide-by-4, -8, etc.
Data Latch: Data on 1D; 1CLK rising edge captures data to 1Q; hold until next clock
Debounce: D=VDD; CLK=button with RC filter (R=100k, C=0.1µF to GND); R=reset; one clean output per press
SR Latch: Use S and R inputs only; ignore CLK and D; S pulse sets Q=1, R pulse clears Q=0
Shift Register: 1Q → 2D; shared clock; 2-stage shift register; cascade for longer

Alternative Models:What chips are recommended as replacements for CD4013BE

Model	Manufacturer	Key Difference	Package	Supply
CD4013BM	TI	SOIC-14 surface-mount version with identical logic function and 3-18V range	SOIC-14	3-18V
CD4013BE	TI	Through-hole DIP version for prototyping and legacy board repair	DIP-14	3-18V
HEF4013BT	NXP	Pin-compatible CMOS version with improved ESD protection and 3-15V supply	SOIC-14	3-15V
MC144013BDR2G	onsemi	Pin-compatible equivalent with RoHS compliance and AEC-Q100 automotive option	SOIC-14	3-18V
74HC74D	TI/Nexperia	HC CMOS version with higher speed and 2-6V supply for modern logic systems	SOIC-14	2-6V
74HC74N	TI/Nexperia	HC CMOS through-hole version for prototyping with 2-6V supply range	DIP-14	2-6V
74HCT74D	Nexperia	HCT version with TTL-compatible inputs for mixed 5V TTL/CMOS systems	SOIC-14	4.5-5.5V

CD4013 is the CMOS 4000-series dual d-type flip-flop operating over the wide 3-18V supply range. The HEF4013 (NXP) and MC144013 (onsemi) are direct pin-compatible equivalents. For higher speed at the cost of narrower voltage range, the 74HC74 HC/HCT families offer significantly faster propagation delay and lower power consumption at 2-6V. Surface-mount versions use the BM/M suffix (SOIC); through-hole versions use the BE suffix (DIP).