TPS5303015DGSR

The TPS53015DGSR from Texas Instruments is a single-phase synchronous buck controller designed for high-current, wide-input-voltage power supply applications. As a controller (not a converter), it drives external N-channel MOSFETs, allowing designers to select MOSFETs optimized for their specific output current and efficiency requirements. The device supports output currents up to 25 A, making it suitable for powering high-performance processors, FPGAs, and system rails in server, networking, and industrial equipment.

The D-CAP2 (Direct Capacitor Average Position 2) control mode is the defining feature of this device. Unlike traditional voltage-mode or current-mode controllers that require Type-II or Type-III compensation networks (multiple resistors and capacitors), D-CAP2 achieves stable operation without any external compensation components. This is accomplished by using the output capacitor’s ESR (or a virtual ESR generated internally) as part of the feedback network. The result is a dramatically simplified design with fewer external components, faster time-to-market, and more predictable loop stability across operating conditions.

D-CAP2 also provides exceptionally fast transient response. Because the on-time is adaptively adjusted based on the input-to-output voltage ratio, the controller can respond to load steps in a single switching cycle, rather than the multiple cycles required by fixed-frequency controllers with slow compensation networks. This makes the TPS53015 ideal for applications with rapidly varying load currents, such as CPU core voltage regulation.

The Auto-Skip Eco-Mode extends efficiency to light-load conditions. At loads below the continuous conduction threshold, the controller enters a pulse-skipping mode where switching pulses are issued only when the output voltage drops below the regulation threshold. This reduces switching losses and gate drive losses at light load, maintaining efficiency above 80 percent even at 10 mA load current. The transition between PWM mode and Eco-Mode is seamless, with no output voltage disturbance.

The integrated 5-V linear regulator (VREG5) simplifies the power supply architecture. The VREG5 pin provides a 5-V output that powers the gate drivers and can supply up to 30 mA of additional current for external circuitry. This eliminates the need for a separate bias supply in many designs. The VREG5 output is active only when the EN pin is asserted high, reducing quiescent current in shutdown mode to less than 10 uA.

The thermally compensated overcurrent protection (OCP) uses the low-side MOSFET’s on-resistance (RDSON) for current sensing, eliminating the need for a separate current-sense resistor. The OCP threshold has a positive temperature coefficient of 4000 ppm/degree C, which closely matches the temperature coefficient of the MOSFET RDSON. This ensures consistent overcurrent protection across the operating temperature range without over-designing the current limit.

The power-good (PG) output provides an open-drain signal that indicates when the output voltage is within the regulation window. This is useful for sequencing multiple power rails, enabling downstream circuitry only when the supply is stable, or generating a system reset signal.

The DGSR suffix indicates tape and reel packaging (DGS = VSSOP-10 package, R = tape and reel), suitable for automated SMT assembly.

The TPS53015DGSR operates as an adaptive on-time D-CAP2 mode synchronous buck controller driving external N-channel MOSFETs.

D-CAP2 Control Mode: The D-CAP2 architecture combines an adaptive on-time pulse width modulation (PWM) controller with an internal ripple injection circuit. The output voltage is sensed at the VFB pin through a resistor divider. The controller compares the VFB voltage (with added internal ripple) to an internal 0.768-V reference. When the combined signal falls below the reference, a new on-time pulse is initiated. The on-time duration is adaptively calculated based on the input voltage (VIN) and output voltage (VFB x divider ratio) to maintain an approximately constant switching frequency of 500 kHz. This adaptive on-time mechanism inherently provides feed-forward compensation for input voltage changes, as a higher VIN results in a shorter on-time for the same output voltage.

Ripple Injection: For stability, the D-CAP2 mode requires a minimum amount of ripple at the VFB pin. When using ceramic output capacitors (which have very low ESR), the natural output voltage ripple may be insufficient. The TPS53015 includes an internal ripple injection circuit that generates a synthetic ripple signal added to the VFB voltage, ensuring stable operation even with all-ceramic output capacitor designs. When using POSCAP, SP-CAP, or other capacitors with higher ESR, the natural ripple may be sufficient and the internal injection circuit adapts accordingly.

Adaptive Gate Drivers: The DRVH (high-side) and DRVL (low-side) outputs drive external N-channel MOSFETs. The DRVH output is referenced to the SW node (switch node), while the DRVL output is referenced to PGND. The bootstrap supply for the high-side driver is provided through an internal PMOS switch between VREG5 and VBST, eliminating the need for an external bootstrap diode. A 0.1-uF capacitor between VBST and SW stores the bootstrap charge. The adaptive dead-time control prevents shoot-through current by ensuring that one MOSFET is fully off before the other is turned on.

Loss-Less Current Sensing: The overcurrent protection uses the voltage drop across the low-side MOSFET during its on-time to sense the inductor current. This method eliminates the power loss and cost of a dedicated current-sense resistor. The OCP threshold is internally set with a positive temperature coefficient of 4000 ppm/degree C to track the MOSFET RDSON temperature drift.

Eco-Mode Operation: At light loads, when the inductor current would otherwise become negative (discontinuous conduction), the controller enters Eco-Mode. In this mode, the low-side MOSFET is turned off when zero inductor current is detected, preventing negative inductor current and the associated efficiency loss. The controller then waits in a quiescent state until the output voltage drops below the regulation threshold before issuing the next on-time pulse. This pulse-frequency modulation (PFM) behavior maintains high efficiency at light load.

Soft Start: The internal soft-start circuit gradually increases the reference voltage from 0 V to the target value over a fixed 1.4 ms period. In pre-biased conditions (where the output capacitor already has a voltage), the controller does not sink current from the pre-biased output, preventing output voltage undershoot during startup.

Protection Circuits: The overcurrent limit (OCL) is cycle-by-cycle, limiting the peak inductor current on a pulse-by-pulse basis. The overvoltage protection (OVP) turns off the high-side MOSFET and turns on the low-side MOSFET when the output exceeds 112 percent of the target. The undervoltage protection (UVP) shuts down the converter when the output falls below 68 percent of the target. The undervoltage lockout (UVLO) keeps the converter off until VIN exceeds 4.2 V. The thermal shutdown (TSD) disables the converter at approximately 160 degrees C junction temperature.