SI5351A-B-GT

The Silicon Labs SI5351A-B-GT is a versatile I2C-programmable clock generator ideally suited for replacing crystals, crystal oscillators, VCXOs, PLLs, and fanout buffers. Based on a PLL + high-resolution MultiSynth fractional divider architecture, the device can generate any frequency up to 200MHz on each of its three outputs with 0ppm error. A single low-cost 25MHz or 27MHz crystal serves as the reference. The dual fractional-N PLLs and MultiSynth dividers allow generation of non-integer-related clock frequencies, enabling one device to synthesize clocks for multiple domains. With 70ps typical period jitter and configurable rise/fall times, the SI5351A delivers clean, low-noise clock signals.

The SI5351A-B-GT operates through a two-stage synthesis architecture: 1) Input Stage: An external 25MHz or 27MHz crystal drives the internal oscillator. Internal load capacitors (0/6/8/10pF selectable) eliminate the need for external components. 2) First Synthesis Stage: Two fractional-N PLLs (PLLA and PLLB) multiply the crystal reference to a high-frequency intermediate clock (600-900MHz). The fractional-N architecture allows non-integer multiplication ratios for precise frequency generation. 3) Second Synthesis Stage: Each output has a dedicated MultiSynth fractional divider that divides the PLL output to the desired frequency. The high-resolution fractional dividers enable 0ppm frequency error. 4) Output Stage: Additional integer R dividers allow frequencies as low as 2.5kHz. Crosspoint switches route any PLL to any output, providing total flexibility. I2C registers configure all parameters.

• RF transceiver local oscillator generation for amateur radio and SDR
• FPGA multi-clock domain generation from single crystal
• Replacing multiple crystal oscillators in consumer electronics