نظرة عامة على المنتج
The MPC860SRVR50D4R2 is a PowerQUICC I communications processor from NXP Semiconductors (formerly Freescale). It integrates a 32-bit Power Architecture core running at 50MHz with a Communications Processor Module (CPM) containing 4 SCCs, 2 SMCs, SPI, and I2C. The MPC860SR variant supports ATM over UTOPIA in addition to 10/100 Ethernet. Packaged in a 357-pin TBGA, this device is now obsolete but was widely deployed in networking and communications equipment.
المواصفات الرئيسية
| Core Architecture | Power Architecture (MPC8xx) |
| Core Frequency | 50 MHz |
| Instruction Cache | 4 KB |
| Data Cache | 4 KB |
| On-Chip SRAM | 8 KB dual-port |
| SCCs | 4 |
| SMCs | 2 |
| إيثرنت | 10/100 Mbps (MII) |
| ATM | Yes (UTOPIA) |
| SPI | 1 |
| I2C | 1 |
| Memory Controller | 8 banks (up to 32-bit data bus) |
| Core Voltage | 2.5V |
| I/O Voltage | 3.3V |
| الحزمة | 357-pin TBGA (25×25 mm) |
| درجة حرارة التشغيل | 0C to +95C (Extended) |
| حالة الجزء | Obsolete |
الميزات
- 32-bit Power Architecture core with MMU and caches
- Communications Processor Module (CPM) offloads protocol processing
- 4 SCCs supporting Ethernet, HDLC, UART, transparent modes
- 10/100 Ethernet MII interface
- ATM support via UTOPIA interface (MPC860SR variant)
- PCMCIA socket controller (2 sockets)
- 8-bank memory controller for DRAM, SRAM, EPROM, Flash
التطبيقات
- Router and switch control plane processor
- T1/E1 channelized communication controllers
- ATM edge switches and concentrators
- Industrial protocol gateways
- Telecom access equipment