LPC4370FET100

The NXP LPC4370FET100 is an ARM Cortex-M4 based microcontroller with dual Cortex-M0 co-processors for embedded applications requiring high-performance digital signal processing and real-time control. The asymmetric multi-core architecture allows the Cortex-M4 to handle DSP algorithms and complex computations while the two Cortex-M0 cores manage I/O processing and real-time tasks independently. The device features 282KB of multi-bank SRAM that can be shared or dedicated to individual cores, 80Msps 12-bit high-speed ADC for rapid data acquisition, dual HS USB, 10/100 Ethernet, and the unique State Configurable Timer (SCT) for complex timing and PWM generation. The SPIFI interface allows execution from external Flash, reducing system cost.

The LPC4370FET100 operates as an asymmetric multi-core microcontroller: 1) Cortex-M4 Core: The primary CPU runs at 204MHz with hardware FPU and DSP instructions, handling complex signal processing, communication stacks, and application logic. It has priority access to shared resources. 2) Cortex-M0 Cores: Two secondary cores operate at 150MHz for independent real-time I/O processing and peripheral management. They handle low-latency tasks offloaded from the M4. 3) Inter-Core Communication: Shared SRAM banks, mailboxes, and interrupts enable data exchange and synchronization between cores. The M4 can start/stop M0 cores via reset registers. 4) Peripherals: The 80Msps HSADC provides rapid analog conversion. Dual USB, Ethernet, and multiple serial interfaces support connectivity. The SCT generates complex PWM and timing patterns through state-machine programming.

• Multi-axis motor control with one core per axis plus supervision
• High-speed data acquisition with real-time signal processing
• Industrial Ethernet gateways with concurrent protocol handling