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AD9649BCPZ-40

14-bit 40MSPS ADC, 1.8V, SNR 74.7dBFS, 700MHz BW, LFCSP-32

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Manufacturer Part：

AD9649BCPZ-40

Package：

32-Lead LFCSP (5 × 5 × 0.85 mm w/ EP)

Brand：

Product Categories：

Analog Linear ICs, Integrated Circuits ICs

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Description

Product Overview

The AD9649BCPZ-40 from Analog Devices is a 14-bit, 40 MSPS monolithic analog-to-digital converter operating from a single 1.8 V supply. It features a high-performance sample-and-hold circuit, on-chip voltage reference, and SNR of 74.7 dBFS at 9.7 MHz input. The device uses a pipelined architecture with output error correction for guaranteed no-missing codes over the full operating temperature range.

Key Specifications

Resolution: 14 bits
Sample Rate: 40 MSPS
SNR: 74.7 dBFS @ 9.7 MHz, 71.5 dBFS @ 200 MHz
SFDR: 93 dBc @ 9.7 MHz, 80 dBc @ 200 MHz
DNL: ±0.35 LSB
Power: 55 mW @ 40 MSPS
Analog Input Bandwidth: 700 MHz
Input Range: 2 V p-p differential
Supply: 1.8 V analog, 1.8-3.3 V output driver
Data Format: Offset binary, Gray code, or two’s complement
Operating Temperature: -40°C to +85°C
Package: 32-lead LFCSP (5 × 5 × 0.85 mm)

Features

On-chip reference and sample-and-hold circuit
SPI port for flexible configuration
Programmable clock divider (1, 2, or 4)
Data clock output (DCO) with programmable alignment
Built-in digital test pattern generation
Energy-saving power-down modes
Pin-compatible with AD9629 (12-bit) and AD9609 (10-bit)

Applications

Communications infrastructure
Multi-mode digital receivers (GSM, WCDMA, LTE)
Medical imaging and ultrasound
Radar and LIDAR systems
Handheld oscilloscopes

Product Introduction:AD9649BCPZ-40 Product Introduction

The AD9649BCPZ-40 is a 14-bit, 40 MSPS analog-to-digital converter from Analog Devices designed for communications and instrumentation applications. Operating from a single 1.8 V analog supply with a separate 1.8 V to 3.3 V output driver supply, the device achieves 74.7 dBFS SNR and 93 dBc SFDR at 9.7 MHz input frequency. The multi-stage differential pipelined architecture with output error correction guarantees no missing codes over the full -40°C to +85°C temperature range. A patented sample-and-hold circuit maintains excellent performance for input frequencies up to 200 MHz. The SPI interface enables flexible configuration including data format selection, clock divider settings, power-down modes, and digital test pattern generation. The 32-lead LFCSP package is pin-compatible with AD9629 (12-bit) and AD9609 (10-bit), providing an easy resolution migration path.

Working Principle:AD9649BCPZ-40 Working Principle

The AD9649 employs a multi-stage differential pipelined architecture. The input signal is first captured by a sample-and-hold circuit with 700 MHz bandwidth, then digitized through a cascade of sub-ADC stages. Each stage resolves a portion of the bits and passes the residue to the next stage, with digital error correction ensuring 14-bit accuracy. The on-chip 1.0 V bandgap reference sets the full-scale range (2 V p-p differential). An optional clock divider (1, 2, or 4) reduces the effective sample rate. Digital output data is available in offset binary, Gray code, or two’s complement format via 14 parallel CMOS output pins. A Data Clock Output (DCO) provides precise output latch timing. The SPI interface allows runtime configuration of operating modes, data alignment, and test pattern injection.

Pin Description:AD9649BCPZ-40 Pin Definition and Functions

Pin	Name	Description
1	CLK+	Differential Encode Clock+
2	CLK-	Differential Encode Clock-
3, 24, 29, 32	AVDD	1.8 V Analog Supply
4	CSB	SPI Chip Select (Active Low)
5	SCLK/DFS	SPI Clock / Data Format Select
6	SDIO/PDWN	SPI Data I/O / Power-Down
7-12, 14-21	D0-D13	ADC Digital Outputs (D0=LSB, D13=MSB)
13	DRVDD	Output Driver Supply (1.8-3.3V)
22	DCO	Data Clock Output
23	MODE/OR	Mode Select / Out-of-Range Output
25	VREF	1.0 V Reference Input/Output
26	SENSE	Reference Mode Selection
27	VCM	Common-Mode Voltage Output
28	RBIAS	Bias Resistor (10 kΩ to GND)
30, 31	VIN-, VIN+	Differential Analog Input
0	EPAD	Exposed Paddle (GND, must solder)

Application Scenarios:In which products and applications isAD9649BCPZ-40 used

Communications Infrastructure: Multi-carrier WCDMA/LTE receiver digitization with 93 dBc SFDR minimizing intermodulation
Medical Imaging: Portable ultrasound beamforming with 74.7 dBFS SNR at 1.8 V low power (55 mW)
Radar/LIDAR: High-speed target detection systems leveraging 700 MHz input bandwidth for IF sampling
Handheld Oscilloscopes: 14-bit resolution at 40 MSPS enables 5 MHz bandwidth portable instruments
Smart Antenna Systems: Multi-channel receiver digitization with SPI-configurable gain and format settings