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RTL8197H-VE5-CG


Highly integrated 2T2R 802.11b/g/n WiSoC with 1GHz MIPS 24Kc CPU, 128MB embedded DDR2, 5-port FE switch with RGMII, PCIe Gen1, USB 2.0, and hardware security engine in DR-QFN128 package.

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Manufacturer Part:

RTL8197H-VE5-CG

Package:

DR-QFN128 (10mm x 10mm, 0.4mm pitch)

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Description

The RTL8197H-VE5-CG is a highly integrated 2T2R 802.11b/g/n Wireless System-on-Chip (WiSoC) manufactured by Realtek Semiconductor. It features a MIPS 24Kc processor running at up to 1 GHz with 64 KB I-Cache and 32 KB D-Cache, 128 MB of embedded DDR2 memory, and an integrated 5-port Fast Ethernet switch with RGMII gigabit MAC interface. The on-chip 2.4 GHz 2T2R Wi-Fi transceiver supports up to 300 Mbps data rates with TXBF, STBC, LDPC-Tx and MRC. Key peripherals include PCIe Gen1 Host, 2× USB 2.0, 2× SPI, 3× UART, 2× I2C, I2S, PCM, SDXC/eMMC, 4× PWM, and a hardware Security Engine with AES/DES/SHA acceleration. Fabricated in 28 nm process and packaged in a 10×10 mm DR-QFN128, the RTL8197H-VE5-CG is designed for dual-band smart routers, mesh Wi-Fi systems, wireless access points, and IoT gateways.

The RTL8197H-VE5-CG is a highly integrated 2T2R 802.11b/g/n WiSoC (Wireless System-on-Chip) manufactured by Realtek Semiconductor Corp. It belongs to the RTL8197F family and is fabricated on a 28nm process node. The chip integrates a 1GHz MIPS 24Kc processor with 64KB I-Cache and 32KB D-Cache, a 2T2R 802.11b/g/n MAC/BB/RF wireless transceiver achieving up to 300Mbps PHY rate, a 5-port 10/100Mbps Fast Ethernet switch configurable as 5 FE PHY or 1 RGMII + 4 FE PHY, two USB 2.0 host controllers, 128MB of embedded DDR2 SDRAM (MCM package), and comprehensive peripheral interfaces including PCIe Gen1 Host, SPI, UART, I2C, I2S, PCM, SDXC/eMMC, and GPIO. The RTL8197H variant is differentiated from other RTL8197F series members by its 5-port FE switch supporting RGMII uplink for Gigabit Ethernet, making it ideal for multi-LAN port routers and mesh Wi-Fi nodes. A hardware Security Engine supports AES/DES/SHA cryptography, and a 4-channel GDMA controller offloads data transfer tasks. The chip supports Wi-Fi EasyMesh and is widely adopted in commercial products such as H3C NX15 (AX1500) and D-Link DIR-841 (AC1200).

1. Processor Subsystem: The MIPS 24Kc CPU runs at up to 1GHz with 64KB I-Cache and 32KB D-Cache, executing the embedded Linux kernel, network protocol stack (TCP/IP, NAT, firewall), and application-layer software through an internal AMBA bus fabric.
2. Wireless Subsystem: The 2.4GHz 2T2R 802.11b/g/n MAC/BB/RF transceiver is fully integrated on-chip, supporting HT20/HT40 channel bandwidths with MIMO processing for up to 300Mbps PHY rate. Integrated PA/LNA minimize external RF components. Transmit Beamforming (TxBF), STBC, LDPC-Tx, and MRC-Rx are supported for enhanced link reliability.
3. Ethernet Switch Subsystem: A 5-port 10/100Mbps Fast Ethernet switch supports configurable port mapping — either 5 FE PHY or 1 RGMII + 4 FE PHY mode. The RGMII MAC interface connects to an external Gigabit PHY (e.g., RTL8211F) for 1000M WAN/LAN, with Auto MDI/MDIX on all FE ports.
4. Memory Subsystem: 128MB DDR2 SDRAM is embedded within the MCM package. The memory controller supports SPI NOR Flash (up to 128MB), SPI NAND Flash (up to 4Gbit), and Parallel NAND Flash (up to 8GB) for firmware storage. Typical designs use 16MB SPI NOR Flash.
5. Peripheral Interface Subsystem: Rich I/O includes 1x PCIe Gen1 Host, 2x USB 2.0, 2x SPI, 3x UART, 2x I2C, 1x I2S, 1x PCM, 4x PWM, and 1x SDXC/eMMC for flexible IoT, VoIP, and storage expansion.
6. Hardware Acceleration Engine: A dedicated Security Engine supports AES/DES/SHA-1/SHA-256 hardware cryptography for VPN and WPA encryption offload. The GDMA controller provides 4 independent DMA channels for memory-to-memory and memory-to-peripheral transfers without CPU intervention.

Pin Group Pin Count Type Default Function Alternate Function Power-on State
VDD_Core 8 P 1.2V Core Supply 1.2V
VDD_IO 10 P 3.3V I/O Supply 3.3V
GND 12 G Ground 0V
RF_ANT0/1 4 I/O 2.4GHz RF TX/RX Hi-Z
RGMII 13 I/O Gigabit MAC Interface GPIO Configured by strap
FE_SW_P0-P3 16 I/O 4x FE PHY Ports GPIO Configured by strap
PCIe 6 I/O PCIe Gen1 Host (TX/RX/CLK/RST) GPIO Hi-Z
USB2.0 (x2) 8 I/O USB DP/DM (Port 0 and 1) GPIO Hi-Z
SPI0 5 I/O SPI NOR Flash (CS/CLK/DQ0-3) GPIO SPI Boot
SPI1 4 I/O General SPI GPIO/PWM Hi-Z
UART0-2 8 I/O 3x UART (TX/RX) GPIO UART0 = Debug
I2C0/1 4 I/O 2x I2C (SCL/SDA) GPIO Hi-Z
I2S 4 I/O I2S Audio (CLK/WS/SDI/SDO) GPIO Hi-Z
PCM 4 I/O PCM Voice Interface GPIO Hi-Z
SDXC/eMMC 6 I/O SD/eMMC (CLK/CMD/DAT0-3) GPIO Hi-Z
PWM0-3 4 O 4x PWM Output GPIO Low
GPIO_A-H 20+ I/O General Purpose I/O PWM/LED/UART/I2C Input (default)
Strap/Config 6 I Boot Configuration Straps GPIO Sampled at reset
Application Description
Dual-Band Smart Routers Paired with RTL8832BR (5GHz Wi-Fi 6, 2T2R, AX1200) via PCIe to form AX1500 dual-band solutions. RTL8197H handles 2.4GHz Wi-Fi and CPU duties. Example: H3C NX15.
Mesh Wi-Fi Nodes Supports Wi-Fi EasyMesh for seamless home mesh networking. 5-port FE switch enables wired backhaul between mesh nodes; PCIe supports 5GHz fronthaul.
IoT Gateways Rich peripheral interfaces (I2C, SPI, UART, USB, GPIO) accommodate sensors and communication modules. Hardware security engine provides AES encryption for secure IoT communication.
VPN / VoIP Gateways Security engine accelerates IPsec/SSL/DTLS encryption. I2S/PCM interface connects voice codecs for VoIP. GDMA offloads packet forwarding under encrypted traffic.
4G/5G CPE USB 2.0 host ports connect cellular modems. RGMII provides gigabit WAN. Embedded 128MB DDR2 sufficient for full protocol stacks (NAT, firewall, QoS).
Model Manufacturer Compatibility Key Difference
RTL8197FS-VE5-CG Realtek PIN-to-PIN (same package) 2-port switch (1 FE PHY + 1 RGMII) instead of 5-port
RTL8197FN-VE4-CG Realtek Same series (pin mapping differs) 5-port FE switch with 5 FE PHY only; no RGMII option
RTL8198D Realtek Software compatible (different package) Higher performance, supports 802.11ac/ax, TF-BGA package
MT7621A MediaTek PCB Rework Required Dual-core MIPS 880MHz, 2x Gigabit Ethernet, popular in OpenWrt
QCA9563 Qualcomm PCB Rework Required MIPS 775MHz, 3×3 802.11n, enterprise AP target
BCM53573 Broadcom PCB Rework Required Similar Wi-Fi SoC functionality
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